Method of manufacturing a thin film transistor array panel

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element

Reexamination Certificate

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Details

C438S034000, C438S151000, C257S072000, C257S059000, C257SE21414, C349S043000

Reexamination Certificate

active

07459323

ABSTRACT:
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode and a pair of redundant electrodes on the first and the second portions of the lower conductive film, respectively, the redundant electrodes exposing a part of the second portion of the lower conductive film; removing the exposed part of the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.

REFERENCES:
patent: 638383 (1899-12-01), Duval
patent: 4938567 (1990-07-01), Chartier
patent: 5036370 (1991-07-01), Miyago et al.
patent: 5132745 (1992-07-01), Kwasnick et al.
patent: 5559345 (1996-09-01), Kim
patent: 5580796 (1996-12-01), Takizawa et al.
patent: 5905549 (1999-05-01), Lee
patent: 6091465 (2000-07-01), Lyu
patent: 6338989 (2002-01-01), Ahn et al.
patent: 6383831 (2002-05-01), Kim
patent: 6654094 (2003-11-01), Wu
patent: 6900873 (2005-05-01), Yamazaki et al.
patent: 2001/0019125 (2001-09-01), Hong et al.
patent: 2001/0019129 (2001-09-01), You
patent: 2001/0032981 (2001-10-01), Kong et al.
patent: 2005/0158925 (2005-07-01), Kim
patent: 1254948 (2000-05-01), None
patent: 11087721 (1999-03-01), None
patent: 2001-230321 (2001-08-01), None
patent: 2001-358343 (2001-12-01), None
patent: 2002314088 (2002-10-01), None
patent: 100192347 (1999-01-01), None
patent: 100205867 (1999-04-01), None
patent: 19990075407 (1999-10-01), None
patent: 1020010017422 (2001-03-01), None
patent: 1020010056769 (2001-07-01), None
patent: 100309210 (2001-09-01), None
patent: 1020020057032 (2002-07-01), None
patent: 1020020066573 (2002-08-01), None
patent: 1020020080866 (2002-10-01), None

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