Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2007-07-12
2008-09-16
Geyer, Scott B. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S780000, C257SE21411, C257SE21414, C257SE27111
Reexamination Certificate
active
07425479
ABSTRACT:
The present invention provides a thin film transistor array panel comprising: an insulating substrate; a first signal line formed on the insulating substrate and extending in a first direction; a second signal line formed on the insulating substrate, extending in a second direction, and intersecting the first signal line; a thin film transistor connected to the first and second signal lines; a passivation layer formed on the second signal line and having a contact hole exposing a portion of the second signal line; and a pixel electrode formed on the passivation layer and connected to the thin film transistor through the contact hole, wherein the passivation layer is formed by coating an organic solution that includes an organic insulating material and a solvent including at least one of PGMEP, EEP, and nBA.
REFERENCES:
patent: 6130379 (2000-10-01), Shiotsuka et al.
patent: 6162745 (2000-12-01), Ito et al.
patent: 2003/0086046 (2003-05-01), You
Jeong Soo-Im
Ju Jin-Ho
Lee You-Kyoung
Cantor & Colburn LLP
Geyer Scott B.
Isaac Stanetta D
LandOfFree
Method of manufacturing a thin film transistor array panel does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a thin film transistor array panel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a thin film transistor array panel will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3975280