Method of manufacturing a TFT array panel

Details Method of manufacturing a TFT array panel Method of manufacturing a TFT array panel

2011-08-16

2011-08-16

Jackson, Jr., Jerome (Department: 2815)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

C257SE27116, C257SE27130

Reexamination Certificate

active

07998786

ABSTRACT:
Multi-layered wiring for a larger flat panel display is formed by depositing molybdenum on a substrate in presence of a precursor gas containing at least one oxygen, nitrogen and carbon to form a molybdenum layer. An aluminum layer is deposited on the molybdenum layer. Another metal layer may be formed on the aluminum layer. The molybdenum layer has a face-centered cubic (FCC) lattice structure with a preferred orientation of (111).

REFERENCES:
patent: 5231039 (1993-07-01), Sakono et al.
patent: 6255706 (2001-07-01), Watanabe et al.
patent: 7029727 (2006-04-01), Kokura et al.
patent: 2001/0015781 (2001-08-01), Tanaka et al.
patent: 2003/0168968 (2003-09-01), Sotani et al.
patent: 2003/0184687 (2003-10-01), Matsubara
patent: 1276622 (2000-12-01), None
patent: 2000-012542 (2000-01-01), None
patent: 2003-215614 (2003-07-01), None
patent: 1020030063284 (2003-07-01), None
S.Kacim, “Structural Behavior of direct-current sputtered and thermally evaporated molybdenum thin films”, Jan. 17, 1994, Thin Solid Films, 249, pp. 150-154.

Affiliated with

Also associated with

Rating

Method of manufacturing a TFT array panel does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing a TFT array panel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a TFT array panel will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2710858