Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-09-19
2006-09-19
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S672000
Reexamination Certificate
active
07109126
ABSTRACT:
In forming five trenches buried with an intermediate conductive layer for connecting transfer MISFETs and driving MISFETs with vertical MISFETs formed thereover, the second and third trenches, and the first, fourth, and fifth trenches are formed separately by twice etching using first and second photoresist films as a mask. Since all the trenches can be formed at a good accuracy even in a case where the shortest distance between the first trench and the second or third trench, and the shortest distance between the second or third trench and the fourth trench is smaller than the resolution limit for the exposure light, the distance between each of the five trenches arranged in one identical memory cell can be reduced to be smaller than the resolution limit for the exposure light.
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Chakihara Hiraku
Nishida Akio
Noguchi Mitsuhiro
Tadokoro Masahiro
Wada Naonori
Antonelli, Terry Stout and Kraus, LLP.
Dang Phuc T.
Renesas Technology Corp.
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