Method of manufacturing a semiconductor integrated circuit...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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Details

C438S791000, C118S725000, C118S620000

Reexamination Certificate

active

06905982

ABSTRACT:
A CVD device (100) used for depositing a silicon nitride has a structure in which a hot wall furnace (103) for thermally degrading a source gas and a chamber (101) for forming a film over a surface of a wafer (1) are separated from each other. The hot wall furnace (103) for thermally degrading the source gas is provided above the chamber (101), and a heater (104) capable of setting the inside of the furnace at a high temperature atmosphere of approximately 1200° C. is provided at the outer periphery thereof. The source gas, supplied to the hot wall furnace (103) through pipes (105) and (106), is thermally degraded in this furnace in advance, and degraded components thereof are supplied on a stage (102) of the chamber (101) to form a film on the surface of the wafer (1).

REFERENCES:
patent: 4866003 (1989-09-01), Yokoi et al.
patent: 5780359 (1998-07-01), Brown et al.
patent: 5812403 (1998-09-01), Fong et al.
patent: 5935334 (1999-08-01), Fong et al.
patent: 5994209 (1999-11-01), Yieh et al.
patent: 6029602 (2000-02-01), Bhatnagar
patent: 6100579 (2000-08-01), Sonoda et al.
patent: 6114216 (2000-09-01), Yieh et al.
patent: 6121086 (2000-09-01), Kuroda et al.
patent: 6413887 (2002-07-01), Fukuda et al.
patent: 6454863 (2002-09-01), Halpin
patent: 63-132434 (1988-06-01), None
patent: 7-66139 (1995-03-01), None
patent: 9-181055 (1997-07-01), None
patent: 9-289209 (1997-11-01), None
patent: 10-154703 (1998-06-01), None
patent: 10-154706 (1998-06-01), None
patent: 10-163184 (1998-06-01), None
patent: 10-178004 (1998-06-01), None
patent: 10-189467 (1998-07-01), None
patent: 10-256244 (1998-09-01), None
patent: 11-016999 (1999-01-01), None
patent: 11-017147 (1999-01-01), None
patent: 11-046000 (1999-02-01), None
patent: 11-074097 (1999-03-01), None
patent: 2000-12802 (2000-01-01), None
patent: 2000-058483 (2000-02-01), None
patent: 2000-114257 (2000-04-01), None
patent: 2000-340562 (2000-12-01), None
patent: 2002-050625 (2002-02-01), None
patent: 2002-141350 (2002-05-01), None
patent: 2002-520849 (2002-07-01), None
patent: WO 00/03425 (2000-01-01), None

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