Method of manufacturing a semiconductor integrated circuit...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S625000, C438S014000

Reexamination Certificate

active

06861344

ABSTRACT:
The corrosion of a pad portion on TEG is prevented, and the wettability of a solder and the shear strength after solder formation of a pad portion of an actual device are improved. A third layer wiring M3on a chip area CA of a semiconductor wafer and a third layer wiring M3on a scribe area SA are respectively comprised of a TiN film M3a, an Al alloy film M3b, and a TiN film M3c. A second pad portion PAD2as the top of a rewiring49on the chip area CA is cleaned. Alternatively, an Au film53ais formed thereon by an electroles splating method. Further, after the formation of the Au film53a, a retention test is carried out. Thereafter, further, an Au film53bis formed and a solder bump electrode55is formed. As a result, it is possible to prevent the corrosion of a first pad portion PAD1of the third layer wiring M3on the scribe area SA which is TEG due to a plating solution or the like by the TiN film M3c. Further, it is possible to improve the wettability of a solder and the shear strength after solder formation of the second pad portion PAD2by the Au films53aand53b.

REFERENCES:
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patent: 6573113 (2003-06-01), Low et al.
patent: 6573170 (2003-06-01), Aoyagi et al.
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patent: 6627548 (2003-09-01), Kruwinus et al.
patent: 6660624 (2003-12-01), Tzeng et al.
patent: 6696353 (2004-02-01), Minn et al.
patent: 6727185 (2004-04-01), Smith et al.
patent: 2000-294607 (1999-04-01), None

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