Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-05-31
2005-05-31
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S694000, C438S761000
Reexamination Certificate
active
06900125
ABSTRACT:
When forming the interconnect trench by “via first” method of the dual damascene process, after providing a via hole in the interlayer dielectric film11, the anti-reflection coating5and the resist layer6are formed such that whichever has a faster etching rate in the formation process of the interconnect trench, out of the anti-reflection coating5and the resist layer6, is disposed at the same level as a bottom portion of the interconnect trench to be formed through the formation process thereof.
REFERENCES:
patent: 6197681 (2001-03-01), Liu et al.
patent: 6424039 (2002-07-01), Wang et al.
patent: 6589881 (2003-07-01), Huang et al.
patent: 2000-091425 (2000-03-01), None
Dang Phuc T.
Sanyo Electric Co,. Ltd.
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