Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate
2006-08-01
2006-08-01
Brewster, William M. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C438S587000, C438S691000
Reexamination Certificate
active
07084022
ABSTRACT:
A method of manufacturing a semiconductor device comprises: forming a first pattern in a first region over a semiconductor substrate; forming a second pattern in a second region separated from the first region over the semiconductor substrate; depositing an interlayer insulation film to cover the first and second patterns; forming a photoresist film on the interlayer insulation film; treating the photoresist film in stepper exposure and development to form a photoresist pattern of a photomask having its device pattern matched with the first pattern and its alignment marks matched with the second pattern; selectively etching off the interlayer insulation film over the first and second patterns, with the photoresist pattern; and after removing the photoresist pattern, flattening the interlayer insulation film to expose the surfaces of the first and second patterns, respectively.
REFERENCES:
patent: 6054355 (2000-04-01), Inumiya et al.
patent: 2003/0032231 (2003-02-01), Efland et al.
patent: 2003/0036025 (2003-02-01), Hirooka
patent: 04-123439 (1992-04-01), None
patent: 2000-294557 (2000-10-01), None
patent: 10-2002-0089998 (2002-11-01), None
Saito et al., “Plasma-Damage-Free Gate Process Using Chemical Mechanical Polishing for 0.1 μm MOSFETs,” Jpn. J. Appl. Phys. (Apr. 1999), 38:2227-31.
Copy of Korean Office Action citing KR 10-2002-0089998.
Brewster William M.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
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