Method of manufacturing a semiconductor device comprising a buri

Details Method of manufacturing a semiconductor device comprising a buri Method of manufacturing a semiconductor device comprising a buri

1995-06-19

1997-07-01

Niebling, John

Fishing, trapping, and vermin destroying

437107, 437126, 437133, 437175, 437203, 437912, H01L 21265, H01L 21203, H01L 2144, H01L 2120

Patent

active

056438079

ABSTRACT:
A method of manufacturing a semiconductor device with a buried channel field effect transistor, comprising the formation of a stack of layers on a substrate with an active semiconductor layer having a non-zero aluminium (Al) content, a semiconductor cap layer without aluminium (Al), a masking layer provided with a gate opening; a first selective etching step with a first etching compound containing fluorine (F) in the cap layer down to the upper surface of the active layer, whereon a stopper layer of aluminium fluoride (AlF.sub.3) is formed automatically; then elimination of the stopper layer; a second, non-selective etching step in the active layer with a second etchant until a first, central gate recess is completed; a third, selective etching process with the first etchant in the cap layer, which takes place laterally for forming the flanks of a second recess whose bottom is the upper surface.

REFERENCES:
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patent: 5229320 (1993-07-01), Ugajin
patent: 5352909 (1994-10-01), Hori
patent: 5364816 (1994-11-01), Boos et al.
patent: 5389574 (1995-02-01), Mizunuma
1992 IEEE MTT-S International Microwave Symposium Digest (CAT. No. 92CH3141-9), Albuquerque, NM, USA, 1-5 Jun. 1992, ISBN 0-7803-0611-2, 1992, New York, NY, USA, XP 000343118, Shanfield et al "One Watt, Very High Efficiency 10 and 18 Ghz Pseudomorphic HEMT's Fabricated by Dry First Recess Etching", pp. 639-641 and cover sheet.

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