Method of manufacturing a semiconductor device comprising a...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Self-aligned

Reexamination Certificate

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C438S365000, C438S546000, C438S564000

Reexamination Certificate

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06300210

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a method of manufacturing a semiconductor device comprising a semiconductor body including a bipolar transistor having a base region, a collector region and an emitter region, a monocrystalline silicon substrate being provided with a first insulating layer, a polycrystalline layer of silicon and a second electrically insulating layer, an opening being formed in this layer structure, which opening extends to a monocrystalline part of the semiconductor body, the bottom of the opening being provided with a third insulating layer, at least a part of the base region being formed via said opening by providing doping atoms in the monocrystalline part of the semiconductor body, and the emitter region being formed by means of a further opening in the third electrically insulating layer, which opening is smaller than the first opening in the monocrystalline part of the semiconductor body. It is noted that, in this application, the term “insulating” is to be taken to mean “electrically insulating”.
Such a method is known from United States patent specification U.S. Pat. No. 5,512,785, published on Apr. 30, 1996. In said document, a description is given of a method of manufacturing a so-called double poly bipolar transistor: reference is made, in particular, to the description of FIG.
6
and FIG.
7
. Such a transistor is obtained by making an opening in a stack of layers comprising a first insulating layer, a polycrystalline layer of silicon and a second insulating layer, which opening extends to a monocrystalline part of the semiconductor body. A third insulating layer (see
FIG. 7
) is subsequently provided on the bottom of this opening by means of thermal oxidation of the semiconductor body. A part of the base region of the transistor is formed by subsequently launching doping atoms, through the third insulating layer, into the monocrystalline part of the semiconductor body. The polycrystalline layer is provided, in the above-mentioned opening, with so-called spacers of (doped) polycrystalline silicon by means of which the polycrystalline layer is connected to the monocrystalline part of the semiconductor body, said spacers forming, in the above-mentioned opening, another part of the base region as a result of out-diffusion. After providing further spacers in the opening, and after forming a window in the third insulating layer, a further polycrystalline layer of silicon is provided in the opening, thereby forming the emitter region in the monocrystalline part of the semiconductor body, which further polycrystalline layer of silicon serves as the connection region of said emitter region.
A drawback of the known method resides in that the transistors manufactured in accordance with said method have electrical characteristics, such as a base current which is (too) high, which exhibit a relatively great spread. In view of the yield, this is undesirable, so that the transistors manufactured by means of the known method are relatively expensive.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a method by means of which transistors can be manufactured having a smaller spread in electrical characteristics and otherwise excellent properties. The method should also be as simple as possible.
To achieve this, a method in accordance with the invention is characterized in that the doping atoms are provided in the monocrystalline part of the semiconductor body before the third insulating layer is applied, the third insulating layer is formed by means of deposition, and the semiconductor body is heated, after the provision of the third insulating layer, in an atmosphere comprising a gaseous compound which includes oxygen. The invention is based on the following recognitions. By providing the doping atoms used to form a part of the base region, in the monocrystalline part of the semiconductor body before providing the third electrically insulating layer, for example, a very shallow ion implantation or selective or non-selective epitaxy, but in particular doping from the gas phase can be used to provide said layer. In all these cases, but particularly in the case of doping from the gas phase, the base region formed, at least the part thereof formed in this step, may be very steep and shallow. As a result, the spread in electrical characteristics of the transistor, such as in the above-mentioned base current, decreases, resulting in a higher yield of the process. The invention is further based on the recognition that this advantage is (partly) lost again if the third insulating layer is subsequently formed by thermal oxidation, as in the known method. A third insulating layer formed by means of deposition from the gas phase does not have this drawback since the provision of such a layer causes no, or at least very little, (out-)diffusion of the part of the base region already formed. However, it has been found that a third insulating layer thus formed leads to considerably worse transistors, i.e. transistors whose base current is much too high, particularly at a low voltage. It has been found that this can be attributed to a relatively high, non-ideal component in the base current, which is caused by recombination, which in turn is caused by surface conditions between the monocrystalline part of the semiconductor body and the third insulating layer. It is precisely the use of a small base thickness as intended by the invention which causes this problem to manifests itself. The above-mentioned surface conditions are neutralized by subjecting the semiconductor body, after the provision of the third insulating layer, to a thermal treatment in an ambient of a gaseous substance which includes oxygen. By virtue thereof, the transistors thus manufactured exhibit a small spread in electrical characteristics and, in addition, an ideal base current which is low also at low voltages, while, surprisingly, the very small thickness of the base region is preserved. An additional advantage is that during this thermal treatment, the packing density of the deposited third insulating layer is increased, so that in the case of a deposited silicon dioxide layer, the properties of a silicon dioxide layer obtained by thermal oxidation are approached.
Preferably, the third insulating layer is made from silicon dioxide and applied by means of CVD (=Chemical Vapor Deposition) using gaseous TEOS (=Tetra Ethyl Ortho Silicate). This applies also to the second insulating layer. A suitable growth temperature lies in the range between 600 and 800° C. A suitable thickness of the third insulating layer is 20 nm.
In a preferred embodiment of a method in accordance with the invention, a compound of oxygen and nitrogen is used as the gaseous compound. In this manner, the transition between the monocrystalline silicon and the third insulating layer is best passivated. Besides, the third insulating layer is slightly converted into an oxynitride. However, the best conditions are those which cause this (bulk) nitrification to be limited: the nitrogen content of the third insulating layer is preferably smaller than 5 at. %. Too high a nitrogen content may lead to the development of recombination centers in the third insulating layer, resulting in a deterioration of the insulating properties, which is undesirable. The best results are achieved if the thermal treatment takes place in a so-called short-cycle annealing step. For example by means of a laser, the semiconductor body is brought to a temperature in the range between 800 and 1100° C. for 5 to 30 seconds. A suitable example of a gaseous compound of oxygen is O
2
. Favorable results have already been achieved with said compound. Surprisingly good results are achieved if an oxide of nitrogen is used as the gaseous compound of oxygen. N
2
O or NO proved to be particularly suitable.
In an important embodiment, the doping atoms are provided in the monocrystalline part of the semiconductor body by exposing the monocrystalline part of the semiconductor body to a gaseous substance comprising the doping atom

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