Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2007-08-01
2011-10-25
Garber, Charles (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S201000, C438S258000, C257SE21209
Reexamination Certificate
active
08043951
ABSTRACT:
A method of manufacturing a semiconductor device on a substrate. The method may include forming a non-volatile memory in a memory area of the substrate. The forming non-volatile memory on a substrate may include formation in the memory area of a floating gate structure and of a control gate structure which is in a stacked configuration with the floating gate structure. One or more gate material layer may be formed in a logic area of the substrate. After forming the control gate structure and the gate material layer, a filling material layer may be deposited over the logic area and the memory area. The filling material layer may be partially removed by reducing the thickness of the filling material in the logic area and the memory area, at least until a top surface of the one or more gate material layer is exposed. Logic devices may be formed in the logic area, the formation may include forming a logic gate structure from the gate material layer.
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International Search Report and Written Opinion correlating to PCT/IB2007/054859 dated Apr. 25, 2008.
Aminpur Massud Abubaker
Beugin Virginie
Freescale Semiconductor Inc.
Garber Charles
Mustapha Abdulfattah
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