Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1998-05-29
1999-11-23
Niebling, John F.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
438455, 438459, H01L 2130
Patent
active
059899743
ABSTRACT:
A method of manufacturing a semiconductor device having a region which is partially thinner than the rest thereof is disclosed. A semiconductor thin layer is formed on an insulating layer by an annealing treatment after implanting ions into the semiconductor substrate at a predetermined depth. A semiconductor material is formed by epitaxial growing to a predetermined thickness on the semiconductor thin layer. The the insulating layer or eliminating the insulating layer and a part of the semiconductor substrate under the insulating layer is eliminated by an etching operation.
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patent: 5854123 (1998-12-01), Sato et al.
Ben Kloeck et al., "Study of Electrochemical Etch-Stop for High-Precision Thickness Control of Silicon Membranes", IEEE Transactions on Electron Devices, vol. 36, No. 4, Apr. 1989, pp. 4-10.
Kuriyama Toshihide
Yamada Keizo
Lattin Christopher
NEC Corporation
Niebling John F.
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