Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2004-12-03
2008-08-12
Malsawma, Lex (Department: 2892)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C257SE21510
Reexamination Certificate
active
07410834
ABSTRACT:
A semiconductor device improved in packaging reliability is disclosed. Each of leads used in the semiconductor device has a first surface positioned between a main surface of a resin sealing body and a back surface opposite to the main surface of the resin sealing body, a second surface positioned on the side opposite to the first surface and exposed from the back surface of the resin sealing body, a first end face positioned on a semiconductor chip side, a second end face positioned on the side opposite to the first end face and exposed from a side face of the resin sealing body, and a recessed portion depressed from the second surface to the first surface side and contiguous to the second end face, the second surface and an inner wall surface of the recessed portion being covered with a plating layer which is higher in solder wettability than the second end face of each of the leads.
REFERENCES:
patent: 6452255 (2002-09-01), Bayan et al.
patent: 6608366 (2003-08-01), Fogelson et al.
patent: 2004/0058479 (2004-03-01), Matsuura et al.
patent: 2000-299400 (2000-10-01), None
Fukaya Syuudai
Hasebe Hajime
Shinya Toshiyuki
Malsawma Lex
Miles & Stockbridge P.C.
Renesas Technology Corp.
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