Method of manufacturing a semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C257SE21175, C257SE21585, C205S157000

Reexamination Certificate

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10892352

ABSTRACT:
A method of manufacturing a semiconductor device is to be provided, which improves filling performance of a conductive layer to be formed by an electrolytic plating process in an interconnect trench or a via hole, and achieves a higher in-plane uniformity in bottom-up performance. An electrolytic plating process to fill with a conductive layer at least one of an interconnect trench and a via hole formed in a dielectric layer on a semiconductor substrate includes a first step of executing a plating operation under a predetermined integrated current density, which is a product of a current density representing a current value supplied per unit area of a plating solution containing a material which constitutes the conductive layer and a plating time, and a second step of executing a plating operation under a lower current density than that of the first step.

REFERENCES:
patent: 6207222 (2001-03-01), Chen et al.
patent: 6797144 (2004-09-01), Su et al.
patent: 2002/0011415 (2002-01-01), Hey et al.
patent: 11-97391 (1999-04-01), None

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