Method of manufacturing a semiconductor device

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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156643, 156648, 156653, 156657, 437 53, 437 67, 437984, 437985, H01L 21306

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047509716

ABSTRACT:
An improved method of manufacturing a semiconductor device having a narrow groove or slot is provided. There are formed on a substrate a heavily n-doped first silicon layer, and oxidation-preventing layer such as silicon nitride, and a weakly doped or undoped second silicon layer. By means of a single masking step, a part of the second silicon layer is removed to exposed portions of the oxidation preventing layer, and the remaining part is partially oxidized. A particle bombardment of the exposed portions of the oxidation-preventing layer is carried out with the oxidized part of the second silicon layer being a mask. Subsequently, the oxide on the second silicon layer is removed leaving non-exposed portions of the oxidation-preventing layer, and then the exposed portions of the oxidation-preventing layer on the first silicon layer are completely etched away. By thermal oxidation, a thin oxide layer is formed on the second silicon layer and an about ten times thicker oxide layer is formed on the first silicon layer. After the non-exposed portion of the oxidation-preventing layer has been etched away, the thin oxide layer on the second silicon layer is etched away entirely and the thicker oxide on the first silicon layer is etched away only superficially. After this, a groove is etched into the first silicon layer at the removed non-exposed portions of the oxidation-preventing layer while simultaneously removing the remaining parts of the second silicon layer.

REFERENCES:
patent: 3767492 (1973-10-01), MacRae et al.
patent: 4053349 (1977-10-01), Simko
patent: 4449287 (1984-05-01), Maas et al.
patent: 4659428 (1987-04-01), Maas et al.

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