Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

1984-07-31

1985-07-30

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29571, 148187, 156643, 156657, 1566591, 156662, 204192EC, 357 41, 357 65, 427 38, 427 88, 427 93, 427 94, H01L 21306, B44C 122, C03C 1500, C23F 102

Patent

active

045320047

ABSTRACT:
A method of manufacturing a GaAs FET is disclosed. In this manufacturing method, a protection film is formed on a GaAs substrate and a dummy gate electrode is formed thereon. A channel length setting film is isotropically formed on the dummy gate electrode to have a constant thickness. Then, an impurity is ion-implanted in the channel length setting film. Thereafter, the channel length setting film is removed. An etching preventive film is anisotropically formed along a substantially vertical direction with respect to the GaAs substrate. The dummy gate electrode is etched using the etching preventive film as a mask so as to form a first opening in the etching preventive film. Then, a second opening is formed in the region of the protection film corresponding to the region in which the dummy gate electrode was present. A gate electrode is formed to be in contact with the GaAs substrate through the first and second openings.

REFERENCES:
patent: 4347654 (1982-09-01), Allen et al.
patent: 4351099 (1982-09-01), Takagi et al.
Yamasaki et al., "Self-Align Implantation for n.sup.+ -Layer Technology (SAINT) for High Speed GaAs ICs," Electronics Letters, vol. 18, No. 3, pp. 119-121, Feb. 4, 1982.
Transactions of the Institute of Electronics and Communications Engineers (Japan) Meeting (Semiconductor Material Department) M. Furuzuka (transliterated) et al.,; pp. 115-116, Sep. 1983.

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