Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor
Reexamination Certificate
2000-03-03
2002-11-19
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Amorphous semiconductor
C438S151000, C438S155000, C438S160000
Reexamination Certificate
active
06482721
ABSTRACT:
This application claims the benefit of Korean Patent Application No. 1999-11740, filed on Apr. 3, 1999, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing polysilicon rapidly from amorphous silicon and more specifically, the present invention relates to a method for forming crystallized polysilicon channels in thin film transistors.
2. Discussion of the Related Arts
Thin film transistors (TFTs) are vital for high performance liquid crystal displays (LCDs), which are one of the most important components of a laptop computer. TFTs are also applied in other two-dimensional (2D) displays, sensors, and electronics. Currently, most large arrays of TFTs are formed on amorphous materials, such as a hydrogen amorphous silicon (a-Si:H). However, a-Si:H based TFTs have drawbacks such as low mobility and high photosensitivity. Therefore, extra process steps are required in the manufacturing process to compensate for these problems. For example, a black matrix is used to block light from reaching the TFTs, and the drivers for the display have to be manufactured in a separate process from the TFTs of the array.
To avoid the problems related to displays with a-Si:H based TFTs, polysilicon TFTs are preferred. However, one significant drawback to a polysilicon TFT is high leakage current. But, proper design of a polysilicon TFT structure can minimize the leakage current, and the display panel manufacturing process is simplified and cost is reduced when the drive circuits are integrated into the pixel TFT manufacturing process. However, a major problem with manufacturing polysilicon TFTs is the formation of polysilicon under certain required conditions, which include: (1) a low process temperature, for example, less than 550° C. on a low temperature glass; (2) a large glass substrate; and (3) a high throughput.
Therefore, high temperature processes, such as annealing, which are conducted at temperatures of about 700° C., are not suitable for the low temperature glass that is required for manufacturing polysilicon TFTs. Several other methods, including laser crystallization, furnace annealing, and reactive chemical vapor deposition have been used for preparing the polysilicon. But these methods also require either high temperatures or lengthy process times. Also, uniformity over a large area is difficult to achieve. Therefore, with conventional methods, high quality polysilicon cannot be made efficiently.
FIG. 1
shows another conventional method for making polysilicon called Metal Induced Lateral Crystallization (MILC), which is included in the furnace annealing method. Referring to
FIG. 1
, after an amorphous silicon layer
21
is provided on a glass substrate
20
, an insulating material is deposited on the amorphous silicon layer
21
and then patterned to define a protection film
23
. On the amorphous silicon layer
21
is provided a metal layer
25
made of a material such as Ni or Pd. Next, the substrate
20
and the metal layer
25
are heated in an electric furnace for over ten hours at about 550° C. A portion of the amorphous silicon layer
21
that is beneath the protection film
23
, where the metal has not been deposited, is crystallized from the outer portions towards the inner portions and constitutes a polysilicon layer
22
.
As mentioned earlier, the conventional methods require either a high temperature process or a lengthy process. Therefore, as in the other conventional methods, the throughput with the MILC process is low, and high quality polysilicon can not be formed.
SUMMARY OF THE INVENTION
To overcome the problems described above, preferred embodiments of the present invention provide a method of manufacturing polysilicon crystals in a TFT such that polysilicon is formed on a large glass substrate rapidly and at low temperatures with the resultant polysilicon TFTs having a high throughput rate.
A preferred embodiment of the present invention provides a method for manufacturing a polysilicon layer including the steps of providing a substrate, forming an amorphous silicon layer on an entire surface of the substrate, and patterning the amorphous silicon layer, forming an active area on the amorphous silicon layer; and applying a voltage to the amorphous silicon layer to form a polysilicon layer using a joule heat that is generated from the applied voltage.
In another preferred embodiment of the present invention, a method for manufacturing a polysilicon layer in a thin film transistor includes providing a substrate, forming an amorphous silicon layer on the entire surface of the substrate, forming an active area on the amorphous silicon layer, doping the amorphous semiconductor layer with a semiconductor material, and depositing a metal layer on the amorphous silicon layer; and applying a voltage to the amorphous silicon layer, and converting the amorphous silicon layer into a polysilicon layer using a joule heat generated from the applied voltage.
In preferred embodiments, the joule heat that is generated by the voltage applied to the amorphous silicon layer crystallizes the undoped portion of the amorphous silicon layer. During the crystallization process, the temperature of the amorphous silicon layer is increased only to about 500° C., which is much lower than the conventional methods.
Further, in preferred embodiments, there are three preferred methods to form the active area of the TFT. In a first preferred method, the active area is defined by forming a protection layer on a predetermined portion of the amorphous silicon layer, doping the amorphous silicon layer with a semiconductor material, and then depositing a metal layer over the substrate and covering the protection layer and the doped amorphous silicon layer. A second preferred method includes providing a photoresist protection layer on the amorphous silicon layer and etching the photoresist protection layer, doping the amorphous silicon layer with a semiconductor material, and depositing a metal layer on the amorphous silicon layer to cover the photoresist protection layer, and patterning the photoresist protection layer and the metal layer to expose a portion of the amorphous silicon layer that is beneath the photoresist protection layer. Finally, a third preferred method includes doping the amorphous silicon layer with a semiconductor material, depositing a metal layer on the amorphous silicon layer, and patterning the doped amorphous silicon layer and the metal layer such that the amorphous silicon layer is over-etched so that a doped portion of the amorphous silicon layer is removed thereby exposing substantially an undoped portion of the amorphous silicon layer.
Other features, elements and advantages of the present invention will be described in detail below with reference to preferred embodiments of the present invention and the attached drawings.
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LG Philips LCD Co., Ltd.
Rocchegiani Renzo N.
Smith Matthew
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