Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1998-02-20
2003-05-27
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S166000, C438S308000, C438S487000
Reexamination Certificate
active
06569716
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to various kinds of transistors such as a Thin Film Transistor (TFT) in a matrix type display apparatus such as a liquid crystal display. More particularly, the invention relates to a method of manufacturing a polycrystalline silicon layer which for use as the active layer of a transistor.
2. Description of the Related Art
There is increasing demand for display devices to display images with high resolution and high quality. To fulfill this requirement, Active Matrix Liquid Crystal Displays (AMLCD) using a thin film transistor as switching element for driving the crystal liquid are commonly used in liquid crystal displays.
Such AMLCDs with a TFT, commonly comprise an amorphous silicon TFT using an amorphous silicon region and a polycrystalline silicon TFT using a polycrystalline silicon film as an active layer of a thin film transistor as a channel region.
Among TFTs, the amorphous silicon TFT can be easily formed on a glass substrate at a low cost with a lower melting point because it may be formed at a lower temperature (e.g. 300° C.). Additionally, the amorphous silicon TFT is advantageous to increasing the size of a display panel because it is easy to form a uniform amorphous silicon film over a large area. Therefore, the amorphous silicon TFTs are currently used for large LCDs.
However, because the mobility degree in the polycrystalline silicon film is higher than that in the amorphous silicon film, an “on” current flows more in the polycrystalline silicon TFT and a sheet resistance (“on” resistance) of the polycrystalline silicon TFT is lower. These characteristics allow the polycrystalline silicon TFT to show improved response characteristics and a better ability to drive a display. Accordingly, it is now understood that the polycrystalline silicon TFT is useful as switching elements in a high resolution, quality LCD. In addition, it is pointed out that the polycrystalline silicon TFT is useful as switching element to drive a liquid crystal for a larger LCD because a selection period (duty ratio) becomes shorter as the display becomes larger. Furthermore, since the polycrystalline silicon TFT uses the polycrystalline silicon film as an active layer, it can be used not only as a driving element for liquid crystals in a pixel portion, but also as a switching element constituting a logic circuit for a driver circuit. Furthermore, it is possible to form the driver elements for liquid crystals and the elements for a logic circuit on a same substrate in a same process. Accordingly, the polycrystalline silicon TFT is currently used for many small or middle sized LCDs which are required to have high resolution and high quality and to be small-sized, as a so-called a driver containing LCD in which a pixel portion and a driver portion are formed on a same substrate.
As mentioned above, a polycrystalline silicon TFT remains advantageous to use in larger displays because such a TFT enables a high resolution and quality LCD to be formed with space around the edges of the panel where the driver could contain. Such a panel would be lightweight.
To achieve these goals, it is necessary to form a polycrystalline silicon TFT on a cheap glass substrate having a low melting point (about 600° C.) with a high yield rate comparable to that of an amorphous silicon TFT. Currently, however, it is difficult to form a polycrystalline silicon film having grains with an appropriate size at a temperature below a melting point of the glass substrate (about 600° C.). Therefore, it is suggested that an amorphous silicon film first be formed on a substrate and then a polycrystalline silicon film be formed by polycrystallizing the amorphous silicon film at a comparative low temperature using a laser annealing.
For example, in a preparation of a polycrystalline silicon TFT with a bottom gate structure for LCD as shown in
FIG. 1A-1D
, it is known a laser annealing method in which an amorphous silicon film formed on a glass substrate is heated by irradiating an excimer laser to polycrystallize the amorphous silicon film.
In the preparation of the polycrystalline silicon TFT with a bottom gate structure, a Cr film is first formed on a glass substrate
10
. After a certain pattern is formed on the film, a gate electrode
12
integral with a gate wiring is made. Next, as shown
FIG. 1B
, a gate insulating film
14
having a two layered structure and an amorphous silicon film
20
(which will be referred to as an a-Si film hereinafter) are successively formed with a plasma CVD (Plasma Enhanced Chemical Vapor Deposition).
Then, the a-Si film
20
is subjected to anneal by irradiating an excimer laser (ELA: Excimer Laser Annealing) to polycrystallize the formed a-Si film
20
and obtain a polycrystalline silicon
22
(which will be referred to as a p-Si hereinafter). The substrate temperature in this instance is normally a temperature ranging from a room temperature to about 300° C.
After the p-Si film
22
is obtained through polycrystallization, a channel stopper film
30
consisting of SiO
2
is formed at a region where a channel region
44
is to be formed (the region corresponding to the gate electrode
12
) on the p-Si film
22
(See FIG.
1
D). Next, an impurity (e.g. phosphorus) is doped to a region corresponding to a source drain region of a TFT by using a channel stopper
30
as a mask from above, as shown in the drawing. It should be noted that the TFT in
FIG. 1D
includes an LDD (Lightly Doped Drain) structure, that regions
42
LS and
42
LD are lightly doped source drain regions (N−), and that regions
40
S and
40
D are heavily doped regions (N+) in the drawing.
After doping, these doped impurities are activated by a Rapid Thermal Annealing (RTA) with lamp annealing, thereby forming source and drain regions and a channel region in the p-Si film
22
. After that, interlayer insulating films
50
and
52
are formed while a source electrode (which also acts as a source wiring in many cases)
70
is connected to the source region
40
S. In case of a TFT for pixel portions in an LCD, a transparent conductive film of ITO (Indium Tin Oxide) which acts as a pixel electrode
60
is connected to the drain region
40
D, thereby the other side of substrates for an LCD is obtained. A plan view of the TFT shown in
FIG. 1D
will be an arrangement as shown in FIG.
2
. (It should be noted that
FIG. 2
shows a status before the source electrode
70
and the pixel electrode
60
are formed.)
As outlined above, in a conventional polycrystalline silicon TFT with a bottom gate structure, the p-Si film
22
is obtained by polycrystallizing the a-Si film
20
with the ELA.
Since the polycrystallization of such an a-Si depends on the supplied amount of heat, i.e. the amount of energy, it is important to control the amount of heat so that it is uniformly supplied to an a-Si film. Namely, the energy of the excimer laser per unit area should be uniformly applied to the a-Si film in order to form a uniform p-Si film
22
.
However, there is a drawback that the size of grains in the p-Si film
22
formed by the ELA are not uniform over all of the area.
The most critical reason why such non-uniformity occurs in the TFT with the bottom gate structure is that the a-Si film
20
to be polycrystallized is formed so as to cover the upper portion of the gate electrode
12
having a high thermal conductivity. Namely, the a-Si is formed to stride across the gate electrode
12
as shown in
FIGS. 1A-1D
or FIG.
2
. The thermal conductivity of a metallic material (for example Cr) constituting the gate electrode
12
is higher than that of the other areas of the glass substrate
10
around the gate electrode
12
. When the excimer laser is applied to the a-Si film
20
, the heat provided by the excimer laser diffuses faster in a region of the a-Si film
20
under which the gate electrode
12
lies than in the other regions of the a-Si film
20
under which the glass substrate lies because of the existence of the gate electrode
12
and gate w
Fahmy Wael
Hogan & Hartson LLP
Pham Hoai
Sanyo Electric Co,. Ltd.
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