Method of manufacturing a one transistor one-capacitor memory ce

Details Method of manufacturing a one transistor one-capacitor memory ce Method of manufacturing a one transistor one-capacitor memory ce

1994-12-30

1997-04-08

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438243, 438459, 438386, 438155, H01L 2170, H01L 2700

Patent

active

056187459

ABSTRACT:
A method of manufacturing a one-transistor one-capacitor memory cell structure. In a first step, a buried insulating film layer is formed in a semiconductor substrate and a semiconductor layer is formed on the buried insulating film layer. In a second step, a capacitor trench is formed in the substrate by penetrating through the buried layer and a dielectric film layer is formed on an inner side wall surface of the trench. Then, a conductive material is filled into the trench to form a capacitor. Finally, an MIS transistor is formed in the semiconductor layer adjacent to the trench capacitor such that either the drain or the source makes contact with the conductive material.

REFERENCES:
patent: 4953125 (1990-08-01), Okumura et al.
patent: 5119155 (1992-06-01), Hieda et al.
patent: 5170372 (1992-12-01), Wong
patent: 5302542 (1994-04-01), Kishi et al.
M. Sakamoto et al, "Buried Storage Electrode (BSE) Cell for Megabit Drams", IEDM 85, 1985, IEEE at pp. 710-713.

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