Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-04-15
1999-01-12
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438643, 438648, 438653, 438656, 438663, 438655, H01L 2144
Patent
active
058588680
ABSTRACT:
Regions of n.sup.+ - and p.sup.+ -types of a semiconductor device are interconnected with a laminated wiring having a low wiring resistance. On the surface of a semiconductor substrate (10), an insulating film (20) is formed covering a field insulating film (12). Contact holes for the n.sup.+ - and p.sup.+ -type regions are formed in the insulating film (20) at areas corresponding to the n.sup.+ - and p.sup.+ -type regions. Thereafter, a refractory metal layer (30A) such as Ti for forming an ohmic contact having a thickness of 100 angstroms or less, an impurity diffusion preventing conductive layer (32A) such as TiN layer, and a refractory metal layer or refractory metal silicide layer (34A) such as W or WSi layer, are formed sequentially in this order from the bottom. A laminated structure of these layers (30A, 32A, 34A) is patterned to form a wiring layer (36). The laminate is subjected to rapid thermal annealing for ohmically contacting the laminate to the n.sup.+ and p.sup.+ -type regions.
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Nguyen Tuan H.
Yamaha Corporation
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