Method of manufacturing a DRAM having an SOI structure

Details Method of manufacturing a DRAM having an SOI structure Method of manufacturing a DRAM having an SOI structure

1995-12-13

1999-03-30

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438241, 438251, 438164, H01L 2100, H01L 218242

Patent

active

058888543

ABSTRACT:
A dielectric layer is formed on a main surface of a semiconductor substrate. A silicon layer is formed on dielectric layer. MOS transistors are formed in silicon layer and include impurity regions in a semiconductor layer. A capacitor is formed by cooperation of the impurity region, the dielectric layer, and the semiconductor substrate. The dielectric layer also serves as an insulating film of an SOI structure. Thus, a semiconductor memory device which achieves high performance and allows high integration can easily be obtained in a DRAM having an SOI structure.

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patent: 5426062 (1995-06-01), Hwang
"A Buried Capacitor Dram Cell with Bonded SOI for 256M and 1GBIT Drams", Toshiyuki Nishihara et al., IEDM 92, 1992, pp. 803-806.
"Novel SOI CMOS Design Using Ultra Thin Near Intrinsic Substrate", S.D.S. Malhi et al., IEEE 1982, pp. 107-111, IEDM.
A Dynamic Ram Cell in Recrystallized Polysilicon, IEEE Electron Device Letters, vol. EDL-4, No. 1 (Jan. 1983), pp. 8-11.

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