Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-03-16
2002-02-19
Smith, Matthew S. (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S627000, C438S637000, C438S653000, C438S685000, C438S702000
Reexamination Certificate
active
06348402
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device comprising a barrier metal for suppressing diffusion of interconnection material.
It is known that diffusion barrier properties of a semiconductor device with respect to Al is improved by exposing a surface of a TiN layer, used as a barrier metal of the semiconductor device, to an oxidizing atmosphere. It is considered that this is because a Ti oxynitride layer having high barrier properties is formed along the surface and grain boundary of the TiN layer.
For example, a TiN film is deposited as a diffusion barrier in a contact hole through which an Al interconnection is to be connected to a diffusion layer formed in an Si substrate, and thereafter annealing (stuffing) is performed in an nitrogen atmosphere including a trace amount of oxygen. When an Al film is deposited thereafter, mutual diffusion of Al and Si due to heat treatments in the following steps can be effectively prevented.
Therefore, with respect to Cu damascene interconnection of a semiconductor device, there has been proposed a method of suppressing diffusion of Cu by forming a Ti oxide [TiO
x
, Ti(ON)
x
] on the surface or the grain boundary of the TiN layer, in the same manner as described above.
However, in this method, barrier properties of the TiN layer with respect to Cu diffusion is not sufficient, and there is a possibility of Cu diffusing into an insulating layer by heat treatments in manufacturing steps. There is a problem that adhesion strength between a Cu film and a TiN layer decreases due to presence of a Ti oxide at the interface between the Cu film and the TiN layer, which results in a failure in CMP process.
BRIEF SUMMARY OF THE INVENTION
The object of the present invention is to provide a method of manufacturing a semiconductor device which improves barrier properties against interconnection material, and is capable of suppressing occurrence of film separation failure in CMP process.
In order to achieve the above object, according to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming one of a groove and a hole in an insulating layer formed on a semiconductor substrate;
forming a first conductive layer including at least a first metal element on a surface of the insulating layer;
forming an oxide layer of the first metal element on a surface of the first conductive layer by exposing the first conductive layer to an oxidizing atmosphere;
depositing on a surface of the oxide layer of the first metal element a second conductive layer including at least a second metal element having a free energy of oxide formation lower than that of the first metal element;
forming an oxide layer of the second metal element at an interface between the first conductive layer and the second conductive layer by reducing the oxide layer of the first metal element by the second metal element; and
burying an interconnection in the one of the groove and the hole in the insulating layer.
It is preferable that the method further comprises a step of selectively removing the second conductive layer, between the step of forming the oxide layer of the second metal element and the step of burying the interconnection in the one of the groove and the hole.
It is preferable that the method further comprises a step of removing the oxide layer of the second metal element formed on a bottom surface of the one of the groove and the hole while leaving the oxide layer of the second metal element formed on side surfaces of the one of the groove and the hole, between the step of forming the oxide layer of the second metal element and the step of burying the interconnection in the one of the groove and the hole.
It is preferable that the second metal element is Al.
It is preferable that the first metal element is an element selected from the group consisting of W, Ti, Ta and Nb, the first conductive layer is a nitride of the element selected from the group consisting of W, Ti, Ta and Nb, and the second metal element is Al.
The interconnection can be a Cu interconnection.
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming one of a groove and a hole in an insulating layer formed on a semiconductor substrate, the insulating layer including an oxide of a predetermined element;
forming on a surface of the insulating layer a first conductive layer including at least a first metal element having a free energy of oxide formation lower than that of the predetermined element;
forming an oxide layer of the first metal element at an interface between the insulating layer and the first conductive layer, by reducing the oxide of the predetermined element by the first metal element; and
burying an interconnection in the groove or hole of the insulating layer.
It is preferable that the method further comprises a step of selectively removing the first conductive layer, between the step of forming the oxide layer of the first metal element and the step of burying the interconnection.
It is preferable that the first metal element is Al.
It is preferable that the predetermined element is Si, and the first metal element is Al.
It is preferable that the method further comprises a step of depositing a second conductive layer including at least a second metal element having a free energy of oxide formation higher than that of the first metal element, between the step of forming the oxide layer of the first metal element and the step of burying the interconnection.
It is preferable that the predetermined element is Si, the first metal element is Al, the second metal element is an element selected from the group consisting of W, Ti, Ta and Nb, and the second conductive layer is a nitride of the element selected from the group consisting of W, Ti, Ta and Nb.
The interconnection can be a Cu interconnection.
According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming one of a groove and a hole in an insulating layer formed on a semiconductor substrate, the insulating layer including at least one element selected from the group consisting of boron, oxygen, carbon and nitrogen;
forming on a surface of the insulating layer a first conductive layer including at least a first metal element;
forming a layer of one selected from the group consisting of boride, oxide, carbide and nitride of the first metal element at an interface between the insulating layer and the first conductive layer, by reacting the one element selected from the group consisting of boron, oxygen, carbon and nitrogen with the first metal element; and
burying an interconnection in the one of the groove and the hole of the insulating layer.
It is preferable that the method further comprises a step of selectively removing the first conductive layer, between the step of forming a layer of one selected from the group consisting of boride, oxide, carbide and nitride of the first metal element and the step of burying the interconnection.
It is preferable that the method further comprises a step of depositing a second conductive layer including at least a second metal element having a free energy of formation of the one selected from the group consisting of boride, oxide, carbide and nitride higher than that of the first metal element, between the step of forming the layer of one selected from the group consisting of boride, oxide, carbide and nitride of the first metal element and the step of burying the interconnection.
It is preferable that the interconnection is a Cu interconnection.
According to the present invention, on a surface of a first conductive layer used as a barrier metal layer of an interconnection, a thin second metal element oxide layer (for example, Al oxide) having excellent barrier properties, against interconnection material, can be selectively formed with a uniform thickness. Since an o
Iijima Tadashi
Kaneko Hisashi
Kawanoue Takashi
Matsuda Tetsuo
Anya Igwe U.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Smith Matthew S.
LandOfFree
Method of manufacturing a copper interconnect does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a copper interconnect, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a copper interconnect will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2960020