Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
1999-05-19
2001-04-17
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S957000
Reexamination Certificate
active
06218308
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a process for manufacturing semiconductor DRAM cells, and more specifically, to a method for forming a MIM (metal/insulator/metal) structure capacitor.
BACKGROUND OF THE INVENTION
Semiconductor Dynamic Random Access Memory (DRAM) devices have been applied widely in the integrated circuits with the advance of semiconductor manufacture. Typically, a memory cell consists of a storage capacitor and an access transistor for each bit to be stored by the semiconductor DRAM. Either the source or drain of the transistor is connected to one terminal of the capacitor. The other side of the transistor and the transistor gate electrode are connected to external connection lines called the bit line and the word line, respectively. The other terminal of the capacitor is connected to a reference voltage. Thus, the formation of a DRAM memory cell comprises the formation of a transistor, a capacitor and contacts to external circuits.
With the coming of Ultra Large Scale Integrated (ULSI) DRAM devices, the sizes of memory cells have gotten smaller and smaller such that the area available for a single memory cell has become very small. This has caused a reduction in capacitor area, which in turn results in a reduction in cell capacitance. Namely, the amount of the charge capable of being stored by the capacitor decreases. Besides, for very small memory cells, planar capacitors produced has lower reliability in operation. Accordingly, the important issue is how to promote the capacitance and reliability of capacitors with the decreasing scale of the devices and the increasing integration of the integrated circuits.
For resolving the above problems, the manufacture of capacitors tends to increase the surface area of the storage electrode, and results in the development of the various types of capacitors such as the trench capacitor and the stacked capacitor. Besides, the high dielectric films are used for the capacitor. The MIM (metal/insulator/metal) structure capacitors are also used to substitute for the MIS (metal/insulator/silicon) structure capacitors gradually due to the MIM structure capacitors having the excellent conduction character and capacitance. Please refer to
FIG. 1
, a typical MIM structure capacitor is illustrated. An insulator layer
3
is formed on a semiconductor substrate
1
, and a metal plug
7
is formed into the contact hole on the insulator layer
3
to connect electrically the bottom electrode
9
and the active devices (not shown) on the semiconductor substrate
1
. A thin dielectric layer
11
is deposited along the surfaces of the bottom electrode
9
and the insulator layer
3
. The top electrode
13
is formed on the thin dielectric layer
11
. It is noted that a barrier layer
5
is formed along the contact hole firstly (namely along the sidewalls of the insulator layer
3
and the top surface of the substrate
1
) before forming the metal plug
7
into the contact hole, to serve as an interface for promoting the junction efficiency between the metal plug
7
and the active devices.
In general, aluminum (Al) is used widely for forming the metal line since aluminum has the lower resistance and good adhension to dielectric materials. However, aluminum can not be fill into the contact holes effectively since the aluminum is always deposited by using the physical vapor deposition (PVD) method semiconductor in manufacture. Especially, it is more difficult to form the aluminum plug into the contact holes with higher aspect ratio.
Therefore, tungsten (W) plug is usually used to take the place of aluminum plug in the MIM structure capacitors in current semiconductor manufacture. Particularly, the tungsten can be deposited by using the chemically vapor deposition (CVD) method results in the step coverage ability of tungsten is better than that of aluminum. However, it is still difficult to form the tungsten plug effectively into the contact holes with the aspect retio more than 10:1. Besides, as described above, the requirement to form Ti/TiN film for serving as the barrier films cause the increasing difficulty to form tungsten plug into the contact holes.
SUMMARY OF THE INVENTION
The prime objective of the present invention is to provide a method for manufacturing the aluminum contact in integrated circuit capacitor.
The second objective of the present invention is to provide a method for manufacturing the DRAM cell with the MIM structure capacitor.
The another objective of the present invention is to form the aluminum contact by substitute the silicon atoms of the polysilicon contact with the aluminum atoms in solid phase by using an annealing procedure.
A method for manufacturing an integrated circuit capacitor is disclosed in the present invention. A semiconductor substrate is etched firstly to form a contact hole. A polysilicon contact is then formed to fill into the contact hole. An aluminum (Al) layer is deposited on the substrate and the polysilicon contact. A titanium (Ti) layer is deposited on the aluminum layer. Next, an annealing step is performed to substitute the polysilicon atoms of the silicon contact in the contact hole with the aluminum atoms of the aluminum layer for forming an aluminum contact in the contact hole, wherein the replaced silicon atoms by the aluminum atoms are driven to react with the titanium layer to form a titanium silicide layer underneath the titanium layer. The aluminum layer, the titanium silicide layer and the titanium layer atop the substrate and the aluminum contact are removed sequently. A first conducting layer is formed on the substrate and the aluminum contact to serve as the bottom electrode. Then, a dielectric film is deposited along a surface of the first conduction layer. A second conducting layer is formed on the dielectric film to serve as the top electrode.
REFERENCES:
patent: 5429980 (1995-07-01), Yang et al.
patent: 5506166 (1996-04-01), Sandhu et al.
patent: 5741721 (1998-04-01), Stevens
patent: 5858838 (1999-01-01), Wang et al.
patent: 5893734 (1999-04-01), Jeng et al.
patent: 6066528 (2000-05-01), Fazan et al.
Chen Kin-Chan
Utech Benjamin L.
Worldwide Semiconductor Manufacturing Corp.
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