Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Patent
1998-07-28
2000-02-08
Niebling, John F.
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
438581, 438592, H07L 21425
Patent
active
06022794&
ABSTRACT:
A method of manufacturing the buried contact window of an SRAM cell. The method includes the steps of first providing a first conductive type substrate that has an isolating structure and a gate thereon. The gate comprises a gate oxide layer, a polysilicon layer and a sacrificial layer. Next, a heavily doped region of a second conductive type is formed in the substrate between the device isolating structure and the gate terminal. The heavily doped region acts as a buried contact window. Thereafter, a metal silicide layer is formed over the heavily doped region so that the two are electrically coupled. Next, the sacrificial layer is removed, and then a conductive layer that includes a polysilicon layer and a tungsten silicide layer is formed over the substrate. Subsequently, the conductive layer is patterned to form a conductive line layer and a gate stack. Finally, a source/drain region having a lightly doped drain structure is formed in the substrate between the conductive line layer and the gate stack layer, wherein the conductive line layer and the metal silicide layer are electrically coupled.
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patent: 5204279 (1993-04-01), Chan et al.
patent: 5585299 (1996-12-01), Hsu
patent: 5700711 (1997-12-01), Hsu et al.
Lattin Christopher
Niebling John F.
United Microeletronics Corp.
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