Method of manufacture of a semiconductor device

Details Method of manufacture of a semiconductor device Method of manufacture of a semiconductor device

1993-04-16

1996-01-30

Dang, Thi

Fishing, trapping, and vermin destroying

437 48, 437 52, 437 60, 437228, 1566551, H01L 2100

Patent

active

054880076

ABSTRACT:
A method for manufacturing a semiconductor device having a closed step portion and a global step portion including an insulating layer is provided. A dummy pattern is formed by forming an insulating layer on the global step portion and then patterning through a photolithography process. After forming the dummy pattern for compensating steps in the global step portion and between the closed step portion and the global step portion, a BPSG layer is formed on both the closed step portion and the global step portion, and then the BPSG layer is heat-treated to cause it to reflow. The BPSG layer as an insulating interlayer having a planarized surface. The improved planarization decreases the occurrence of notching and discontinuities in the succeeding metallization processes thereby enhancing the yield and electrical characteristics of the semiconductor device.

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