Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2008-07-08
2008-07-08
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S612000, C438S614000, C438S508000, C438S508000
Reexamination Certificate
active
11351103
ABSTRACT:
A manufacturing technique that involves embedding one or more semiconductor die into a support substrate and forming conductive traces that lead from die contact pads to redistributed contact pads on the support substrate. Active surfaces of the dice and a working surface of the support substrate are substantially coplanar and the conductive traces are formed on the coplanar surfaces. The redistributed contact pads are sufficiently spaced apart from each other so that conductive balls can be formed thereon. Individual semiconductor device packages are singulated from the support substrate.
REFERENCES:
patent: 5620928 (1997-04-01), Lee et al.
patent: 2004/0033673 (2004-02-01), Cobbley et al.
patent: 2004/0127011 (2004-07-01), Huang et al.
patent: 2005/0082682 (2005-04-01), Liu
patent: 2005/0133935 (2005-06-01), Vasishta et al.
patent: 2006/0202201 (2006-09-01), Maruyama
patent: 2007/0040273 (2007-02-01), Storli
Chee Lee Cheong
Tharumalingam Sri Ganesh A/L A.
Beyer Law Group LLP
Le Dung A.
National Semiconductor Corporation
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