Method of making thermally enhanced substrate-base package

Details Method of making thermally enhanced substrate-base package Method of making thermally enhanced substrate-base package

2007-05-30

2010-06-22

Chambliss, Alonzo (Department: 2892)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S460000, C257S713000, C257S717000, C257S720000, C361S709000

Reexamination Certificate

active

07741158

ABSTRACT:
An array-type package encasing one or more semiconductor devices. The package includes a dielectric substrate having opposing first and second sides with a plurality of electrically conductive vias and a centrally disposed aperture extending from the first side to the second side. A heat slug has a mid portion extending through the aperture, a first portion adjacent the first side of the substrate with a cross sectional area larger than the cross sectional area of the aperture and an opposing second portion adjacent the second side of the substrate. One or more semiconductor devices are bonded to the first portion of the heat slug and electrically interconnected to the electrically conductive vias. A heat spreader having a first side and an opposing second side is spaced from the semiconductor devices and generally parallel with the heat slug, whereby the semiconductor devices are disposed between the heat spreader and the heat slug. A molding resin encapsulates the semiconductor devices and at least the first side of the substrate, the first portion of the heat slug and the first side of the heat spreader.

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