Method of making the mould for encapsulating a leadframe...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S124000, C438S127000, C257SE33066

Reexamination Certificate

active

07351611

ABSTRACT:
A mould for encapsulating an integrated circuit package on a leadframe including a top mould-half and a complementary bottom mould-half enclosing a cavity for encapsulating said package wherein structures are provided on at least one of said mould-halves which, upon the closure of said mould-halves, closes off the spaces between adjacent leads of the leadframe to allow only said leads to extend out of said cavity. The structures may be protrusions from the mould half closing off the spaces. Notches or slots cut to allow the leads' extension are the preferred structures due to ease of machining. The mould design thus enables a leadframe package to be moulded with a peripheral flange as narrow as desired without the need to cut a broad conventional flange formed up to the dam bar because only the leads and tie bars are left to be singulated. A method for making the above mould as well as singulation methods for cutting and punching the leads and tie bars is also disclosed.

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patent: 6696750 (2004-02-01), Yin et al.

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