Method of making stacked capacitor DRAM cells

Details Method of making stacked capacitor DRAM cells Method of making stacked capacitor DRAM cells

1990-03-09

1991-12-31

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437 48, 437 60, H01L 2170

Patent

active

050772325

ABSTRACT:
A method for manufacturing a combined stack-trench type capacitor includes forming a trench in the semiconductor substrate. A conductive layer, used as a first electrode, a dielectric film and another conductive layer, used as a second electrode, are deposited successively and continuously in the trench. The two conductive layers and the sandwiched dielectric film are then etched to form a capacitor pattern. An insulating layer is formed along the edges of the capacitor pattern, and then a third conductive layer is formed over the entire structure.

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patent: 4894696 (1990-01-01), Takeda et al.
patent: 4951175 (1990-08-01), Kurosawa et al.

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