Method of making semiconductor devices by patterning a wafer hav

Details Method of making semiconductor devices by patterning a wafer hav Method of making semiconductor devices by patterning a wafer hav

1996-04-25

1999-05-25

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438666, 438637, 438640, 438652, 438653, 438656, 438671, H01L 2144

Patent

active

059077913

ABSTRACT:
In accordance with a specific deposition/etching sequence, a multi-layer metallization system is formed on the non-planar top surface of a semiconductor wafer. In an electrophoretic deposition step, a conformal uniform-thickness layer of a resist material is then formed on the top surface of the metallization system. In turn, the layer of resist material is lithographically patterned to provide an etch-mask for defining features in the underlying metallization system.

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Shmulovich et al., "successful development of non-planar lithography for micro-machining applications", Summaries of the Papers to be Presented a the Topica, Integrated Photonics Research. 1996 Technical Digest Series & Proceedings of Integrated Photonics, vol. 6, pp. 354-367, Apr. 29, 1996 to May 2, 1996.
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