Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1998-11-17
2000-11-14
Quach, T. N.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438655, 438683, 438786, H01L 213205
Patent
active
061469831
ABSTRACT:
The present invention is directed to a transistor having a stacked silicide metal and method of making same. In general, the method comprises forming a layer of nitrogen-bearing silicon dioxide above the gate conductor and the source and drain regions of a transistor. In one illustrative embodiment, the method further comprises forming a layer of titanium above at least the surface of the gate conductor and the source and drain regions. Thereafter, a layer of cobalt is formed above the layer of titanium. The transistor is then subjected to a heat treating process such that at least the layer of cobalt forms a metal silicide. Also disclosed herein is a partially formed transistor comprised of a gate conductor, a source region and a gate region. In one illustrative embodiment, the transistor is further comprised of a layer of nitrogen-bearing silicon dioxide formed above the gate conductor and the source and drain regions. The transistor further comprises a layer of titanium positioned adjacent the layer of nitrogen-bearing silicon dioxide and a layer of cobalt positioned adjacent the layer of titanium.
REFERENCES:
patent: 4784973 (1988-11-01), Stevens et al.
patent: 5399526 (1995-03-01), Sumi
patent: 5567562 (1996-10-01), Nishio
Gardner Mark I.
Hause Frederick N.
May Charles E.
Advanced Micro Devices , Inc.
Quach T. N.
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