Method of making resist pattern

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Including heating

Reexamination Certificate

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C430S311000, C430S313000, C430S326000

Reexamination Certificate

active

06589718

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of making a resist pattern and more particularly, to a method of making a resist pattern which is applicable to formation of contact holes and/or via holes in a layer or layers of a substrate in semiconductor device fabrication, where the resist pattern (i.e., the patterned resist layer) is used as a mask in the contact/via hole formation process.
2. Description of the Related Art
Semiconductor devices comprise “contact holes” for electrically interconnecting a specific semiconductor or conductive layer with a wiring layer and/or “via holes” for electrically interconnecting an upper wiring layer with a lower wiring layer. In recent years, contact holes and via holes have been becoming smaller according to the increasing integration level.
Typically, contact/via holes are formed by the well-known photolithography and etching techniques. Specifically, after a photo-sensitive resist layer is formed on a dielectric layer, the resist layer thus formed is patterned to have desired openings. The resist layer thus patterned constitutes a “resist pattern” having the openings. Thereafter, using the resist layer thus patterned (i.e., the resist pattern) as a mask, the underlying dielectric layer is selectively etched by way of the openings of the mask, forming contact/via holes in the dielectric layer. Thus, to miniaturize contact/via holes in a desired or target layer, the dimensions of the openings of the resist pattern (i.e., the mask) need to be made smaller according to the desired dimensions of the contact/via holes.
Moreover, since the dimensional error of the contact/via holes (which includes deformation of the contact/via holes themselves) varies dependent on the dimensional error of the openings (which includes deformation of the openings themselves) of the resist pattern, there is the need to form smaller openings in the resist pattern as precisely as possible.
As a result, conventionally, a great deal of effort has been put to decrease the dimensional error of the smaller openings of the resist pattern.
With an example of the prior-art methods to make smaller openings of the resist pattern, after original openings are formed in a resist layer, the resist layer is subjected to a heat treatment at a temperature higher than its softening point, thereby gradually causing plastic deformation in the resist layer. In this method, the dimensions of the original openings are decreased due to the plastic deformation while the shape of the original openings is well controlled. This method is disclosed, for example, in the Japanese Non-Examined Patent Publication Nos. 2-7413 published in 1990, 10-274854 published in October 1998, and 11-295904 published in October 1999.
FIGS. 1A
to
1
D show the prior-art method of making a resist pattern disclosed in the Japanese Non-Examined Patent Publication No. 11-295904.
First, as shown in
FIG. 1A
, a positive electron-beam (EB) resist with chemical amplification property (i.e., a positive, chemically amplified resist) is coated on the surface of a substrate
110
, forming a resist layer
111
thereon. The target layer (not shown) in which contact/via holes are formed is located at the top of the substrate
110
and thus, it may be said that the layer
111
is located on the target layer.
Using an electron-beam direct writing apparatus, specific openings are formed or written in the resist layer
111
. Thus, the layer
111
is selectively exposed to an irradiated electron beam, thereby forming desired exposition areas
111
a
in the layer
111
. Desired original openings are formed in the individual areas
111
a.
Next, as shown in
FIG. 1B
, the resist layer
111
with the exposition areas
111
a
formed on the substrate
110
is subjected to a post exposure bake (PEB) process and developed, selectively removing the areas
111
a
from the resist layer
111
. Thus, original openings
115
are formed to penetrate the resist layer
111
in the respective areas
111
a
. The resist layer
111
with the original openings
115
thus formed is termed an original resist pattern
112
.
Subsequently, as shown in
FIG. 1C
, the original resist pattern
112
is subjected to a heat treatment at a specific temperature higher than the softening temperature of the resist layer
111
for reflowing the pattern
112
. Through this reflowing process, the original openings
115
are plastically deformed and narrowed, resulting in narrowed or contracted openings
115
a
, as shown in FIG.
1
D. The original resist pattern
112
with the narrowed or contracted openings
115
a
is termed a resultant resist pattern
113
.
With the prior-art method explained with reference to
FIGS. 1A
to
1
D, although the narrowing or contracting effect of the original openings
115
can be generated, there is a problem that unallowable fluctuation of the narrowing/contracting effect for the openings
115
occurs if the density of the openings
115
(i.e., the count of the openings
115
within a unit area) in the original resist pattern
112
varies locally within a wide range. This is due to the correlation of the deformation amount of the openings
115
with their density.
As a result, the resultant openings
115
a
thus narrowed or contracted tend to have an undesired shape and/or undesired dimensions. In the worst case, some of the original openings
115
disappear (i.e., cease to exist) and accordingly, desired contact/via holes are unable to be formed in the underlying target layer (not shown) of the substrate
110
.
The above-described problem can be solved by a measure to change or adjust the dimensions of the original openings
115
in the original resist pattern
112
prior to the reflowing process according to the density distribution of the openings
115
within the pattern
112
. This measure can be comparatively easily applied to the memory cells having the periodically-varying density distribution of the openings
115
. However, this measure is very difficult to be applied to the logic cells having the randomly-varying density distribution of the openings
115
.
The deformation amount of the individual original openings
115
for the logic cells can be predicted with the use of computer simulation or the like. In this case, however, there arises another problem that it takes extremely long time to make a desired resist pattern. Thus, the above-described measure is unable to be applied in practice.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a method of making a resist pattern that decreases or eliminates the fluctuation of deformation of original openings of a resist layer which is induced by the change of their density (i.e., the count of the original openings within a unit area) in the reflowing process.
Another object of the present invention is to provide a method of making a resist pattern that decreases or eliminates the fluctuation of deformation of original openings of a resist layer which is induced by their location or position in the reflowing process.
Still another object of the present invention is to provide a method of making a resist pattern that prevents or effectively suppresses unallowable fluctuation of the narrowing/contracting effect for original openings of a resist layer even if their density varies locally within a wide range.
A further another object of the present invention is to provide a method of making a resist pattern that copes with the miniaturization of resultant openings with a simple measure.
A still further another object of the present invention is to provide a method of making a resist pattern that copes with the miniaturization of resultant openings with a simple measure independent of their density change.
The above objects together with others not specifically mentioned will become clear to those skilled in the art from the following description.
A method of making a resist pattern according to the present invention comprises the steps of:
(a) forming a resist layer on a target layer;
(b) pa

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