Method of making near chip size integrated circuit package

Details Method of making near chip size integrated circuit package Method of making near chip size integrated circuit package

2005-11-08

2005-11-08

Chambliss, Alonzo (Department: 2814)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Substrate dicing

C438S114000, C438S458000, C438S464000, C029S835000

Reexamination Certificate

active

06962829

ABSTRACT:
A plurality of integrated circuit chip (IC chip) packages are fabricated simultaneously from a single insulating substrate having sections. In each section, an IC chip is attached. Bonding pads on the IC chip are electrically connected to first metallizations on a substrate first surface. The first metallizations, IC chip including bonding pads and first substrate surface are then encapsulated. Interconnection balls or pads are formed at substrate bonding locations on a substrate second surface, the interconnection pads or balls being electrically connected to corresponding first metallizations. The substrate and encapsulant are then cut along the periphery of each section to form the plurality of IC chip packages.

REFERENCES:
patent: 4138304 (1979-02-01), Gantley
patent: 4508758 (1985-04-01), Wong
patent: 4530152 (1985-07-01), Roche et al.
patent: 4768081 (1988-08-01), Moeller
patent: 4890383 (1990-01-01), Lumbard et al.
patent: 5081520 (1992-01-01), Yoshii et al.
patent: 5087961 (1992-02-01), Long et al.
patent: 5102829 (1992-04-01), Cohn
patent: 5126818 (1992-06-01), Takami et al.
patent: 5153379 (1992-10-01), Guzuk et al.
patent: 5173766 (1992-12-01), Long et al.
patent: 5216278 (1993-06-01), Lin et al.
patent: 5227663 (1993-07-01), Patil et al.
patent: 5239198 (1993-08-01), Lin et al.
patent: 5241133 (1993-08-01), Mullen, III et al.
patent: 5250470 (1993-10-01), Yamaguchi
patent: 5258650 (1993-11-01), Polak et al.
patent: 5311059 (1994-05-01), Banerji et al.
patent: 5311060 (1994-05-01), Rostoker et al.
patent: 5336931 (1994-08-01), Juskey et al.
patent: 5371404 (1994-12-01), Juskey et al.
patent: 5386342 (1995-01-01), Rostoker
patent: 5397746 (1995-03-01), Blish, II
patent: 5436203 (1995-07-01), Lin
patent: 5468999 (1995-11-01), Lin et al.
patent: 5472646 (1995-12-01), Uchida et al.
patent: 5473512 (1995-12-01), Degani et al.
patent: 5474957 (1995-12-01), Urushima
patent: 5489059 (1996-02-01), Rostoker et al.
patent: 5578525 (1996-11-01), Mizukoshi
patent: 5593926 (1997-01-01), Fujihara
patent: 5596485 (1997-01-01), Glenn et al.
patent: 5600181 (1997-02-01), Scott et al.
patent: 5612513 (1997-03-01), Tuttle et al.
patent: 5639989 (1997-06-01), Higgins, III
patent: 5668406 (1997-09-01), Egawa
patent: 5700981 (1997-12-01), Tuttle et al.
patent: 5719440 (1998-02-01), Moden
patent: 5729437 (1998-03-01), Hashimoto
patent: 5737191 (1998-04-01), Horiuchi et al.
patent: 5767447 (1998-06-01), Dudderar et al.
patent: 5776798 (1998-07-01), Quan et al.
patent: 5835141 (1998-11-01), Ackland et al.
patent: 5841192 (1998-11-01), Exposito
patent: 5864132 (1999-01-01), Holcombe
patent: 5872338 (1999-02-01), Lan et al.
patent: 5901257 (1999-05-01), Chen et al.
patent: 5949132 (1999-09-01), Libres et al.
patent: 5973263 (1999-10-01), Tuttle et al.
patent: 5973337 (1999-10-01), Knapp et al.
patent: 5976912 (1999-11-01), Fukutomi et al.
patent: 5981314 (1999-11-01), Glenn et al.
patent: 5990545 (1999-11-01), Schueller et al.
patent: 6092281 (2000-07-01), Glenn
patent: 6111324 (2000-08-01), Sheppard et al.
patent: 6150193 (2000-11-01), Glenn
patent: 6228676 (2001-05-01), Glenn et al.
patent: 55-11361 (1980-01-01), None
patent: 58-48442 (1983-03-01), None
patent: 62-9639 (1987-01-01), None
patent: 05218230 (1993-08-01), None
patent: 06 326218 (1994-11-01), None
patent: WO95/26047 (1995-09-01), None
patent: 10242442 (1998-09-01), None
patent: 11067959 (1999-03-01), None
patent: WO99/13515 (1999-03-01), None
patent: WO99/40624 (1999-08-01), None
Banerji, K., “Development of the Slightly Larger than IC Carrier (SLICC)”, Proceedings of the Feb. 27-Mar. 4, 1994, Technical Program Nepcon West '94, pp. 1249-1256.
Levine, B. and Guinther, F., “The Package”,Electronic Newsvol. 42, No. 2112 (1996), pp. 1,32.
Shweky, I. et al., “A CSP Optoelectronic Package for Imaging and Light Detection Applications,” Part of the IS&T/SPIE Conference on Sensors, Cameras, and Applications for Digital Photography; San Jose, CA. Jan. 1999: SPIE vol. 3650, pp. 63-68.
Lu, Brian, et al., “Active Pixel Sensor (APS) Package,” Ton Hsing Electronic Industries, Ltd.And Silicon Coast, Inc.. pp. 175-178.

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