Method of making multilevel MEMS structures

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S725000

Reexamination Certificate

active

06861363

ABSTRACT:
Multi-levels are etched into silicon. The levels are etched through a combination of crosslinking photoresist, multiple photoresist patterning and development, wet etching and/or dry-etching. RIE, DRIE, and other etch techniques can be used during different steps. The multilevel structure may thereby be produced at commercially acceptable production rates allowing the method of the present application to be used in volume production of multilevel structures.

REFERENCES:
patent: 4284712 (1981-08-01), James
patent: 4689113 (1987-08-01), Balasubramanyam et al.
patent: 4859573 (1989-08-01), Maheras et al.
patent: 5286607 (1994-02-01), Brown
patent: 6156665 (2000-12-01), Hamm et al.

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