Method of making multi-layer gate structure with different stoic

Details Method of making multi-layer gate structure with different stoic Method of making multi-layer gate structure with different stoic

1997-02-13

1999-05-25

Booth, Richard A.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438683, H01L 213205, H01L 214763

Patent

active

059077840

ABSTRACT:
A method of forming a multi-layer silicide gate structure for a MOS type semiconductor device that includes the processing steps of first providing a substrate, then depositing a gate oxide layer on the substrate, then depositing a first refractory metal silicide layer which has a first stoichometry on the gate oxide layer, and finally depositing a second refractory metal silicide layer which has a second stoichometry different than the first stoichometry on the first deposited refractory metal silicide layer.

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