Method of making MOS VLSI semiconductor device with metal gate

Details Method of making MOS VLSI semiconductor device with metal gate Method of making MOS VLSI semiconductor device with metal gate

1992-08-03

1993-10-12

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437192, 437200, 437 21, 437913, 257282, 257384, 257388, 257412, H01L 21265, H01L 2144

Patent

active

052525023

ABSTRACT:
This is a method of fabricating a transistor on a wafer. The method comprises: forming an oxide layer 40 on a doped silicon layer 32; depositing a first resist over the oxide 40 and patterning the resist with a gate oxide configuration having a predetermined gate oxide length; etching to remove portions of the oxide layer 40 to expose portions of the silicon layer 32 using the resist as a mask; depositing a metal layer 42 over remaining portions of the oxide layer and exposed portions of the silicon layer; annealing the wafer to react portions of the metal layer with exposed portions of the silicon layer to form a metal silicide 44; depositing a second resist over the metal and patterning the second resist with a gate configuration having a gate length A smaller than the gate oxide length B; etching the metal to form a metal gate 42 and exposing portions of gate oxide; and implanting dopant adjacent the gate through the exposed gate oxide to provide source/drain regions 38 aligned to edges of the gate, utilizing the metal gate 42 as a mask to substantially prevent doping underneath the gate, whereby the gate need not be precisely centered on the gate oxide and thus difficulties in alignment are substantially eliminated.

REFERENCES:
patent: 3887993 (1975-06-01), Okada et al.
patent: 4643777 (1987-02-01), Maeda
patent: 4661374 (1987-04-01), Doering
patent: 4821085 (1989-04-01), Haken et al.
patent: 5043300 (1991-08-01), Nulman
patent: 5081066 (1992-01-01), Kim

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