Method of making MOS-gated semiconductor devices

Details Method of making MOS-gated semiconductor devices Method of making MOS-gated semiconductor devices

1997-03-11

1999-03-02

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making regenerative-type switching device

Having field effect structure

438268, 438545, H01L 21332

Patent

active

058770445

ABSTRACT:
A gate electrode control structure of an MOS-gated semiconductor device includes four doped regions including a first (source) region forming a first P-N junction with an enclosing composite region comprising a second, lightly doped (channel) region wholly enclosing a third heavily doped (body) region partly enclosing the first region, and a fourth (drain) region forming a P-N junction with the third region. The gate electrode control structure is fabricated using known gate electrode self-alignment doping processes but wherein, in the process for forming the third heavily doped region, a spacer layer is provided on the gate electrode for defining a spacing between the third region and the channel region with an improved degree of precision.

REFERENCES:
patent: 5032532 (1991-07-01), Mori et al.
patent: 5474944 (1995-12-01), Zambrano
patent: 5474946 (1995-12-01), Ajit et al.
patent: 5556792 (1996-09-01), Zambrano

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