Method of making MOS device by forming self-aligned polysilicon

Details Method of making MOS device by forming self-aligned polysilicon Method of making MOS device by forming self-aligned polysilicon

1981-06-29

1984-04-10

Roy, Upendra

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 148 15, 148187, 357 59, 357 91, 427 88, 427 89, H01L 2972, H01L 2126

Patent

active

044412479

ABSTRACT:
A process is described for forming MOS circuits which include underlying polysilicon members such as gate members covered with metal. In one embodiment, a self-aligning tungsten process is used to cover the polysilicon members. Low temperature "rear end" steps are used to prevent deterioration of the underlying metal. For example, a plasma nitride protective layer is used to cover the metal. The polysilicon/metal members provide reduced resistance and increase the speed of the resultant MOS circuits.

REFERENCES:
patent: 4074301 (1978-02-01), Paivinen et al.
patent: 4085498 (1978-04-01), Rideout
patent: 4128670 (1978-12-01), Gaensslen
patent: 4141022 (1979-02-01), Sigg et al.
patent: 4210993 (1980-07-01), Sunami
patent: 4324038 (1982-04-01), Chang et al.
patent: 4330931 (1982-05-01), Liu
Okada et al., IEEE-Solid St. Circuits, 13 (1978) 693.
Icecap Report, Issue 1-12, 1981, pp. 1-12.
Gargini et al., IEDM, Dec. 1981, pp. 54-57.

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