Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-05-22
1999-10-26
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438637, 438638, 438669, 438670, 438671, 438720, 438737, 438738, 438740, H01L 214763
Patent
active
059727888
ABSTRACT:
A metal interconnect having a high conductivity and high resistance to metal migration failure is formed of two layers of metal or alloy (such as TI/CuAlSi) with a dielectric interposed therebetween and a connection made between the layers by a conductive material, preferably in the form of a plug or stud formed in an aperture of an inter-level dielectric, at ends of the interconnect. A high precision metal-to-metal capacitor can be formed from the same layers by forming separate connections to each of the layers. The topography of the interconnect (and capacitor) is of reduced severity and facilitates planarization of an overlying inter-level dielectric.
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"IBM Technical Disclosure Bulletin"; High Capacitance Tungsten to Metal 1 Capacitor for High Frequency Applications; B. D. Johnson et al.; vol. 38, No. 2, Feb. 1995; pp. 611-613.
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El-Kareh Badih
Ryan James G.
Anderson Jay
Gurley Lynne A.
International Business Machines - Corporation
Niebling John F.
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