Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
2005-04-26
2005-04-26
Hoang, Huan (Department: 2818)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
C438S510000, C257S347000
Reexamination Certificate
active
06884702
ABSTRACT:
In one illustrative embodiment, the method comprises forming a gate electrode above an SOI substrate comprised of a bulk substrate, a buried insulation layer and an active layer, the gate electrode having a protective layer formed thereabove, and forming a plurality of dielectric regions in the bulk substrate after the gate electrode is formed, the dielectric regions being self-aligned with respect to the gate electrode, the dielectric regions having a dielectric constant that is less than a dielectric constant of the bulk substrate. In further embodiments, the method comprises forming a gate electrode above an SOI substrate comprised of a bulk substrate, a buried insulation layer and an active layer, the gate electrode having a protective layer formed thereabove, performing at least one oxygen implant process after the gate electrode and the protective layer are formed to introduce oxygen atoms into the bulk substrate to thereby form a plurality of oxygen-doped regions in the bulk substrate, and performing at least one anneal process to convert the oxygen-doped regions to dielectric regions comprised of silicon dioxide in the bulk substrate. In one illustrative embodiment, the device comprises a gate electrode formed above an SOI structure comprised of a bulk substrate, a buried insulation layer, and an active layer, and a plurality of dielectric regions comprised of silicon dioxide formed in the bulk substrate, the dielectric regions being self-aligned with respect to the gate electrode.
REFERENCES:
patent: 5510640 (1996-04-01), Shindo
patent: 5608252 (1997-03-01), Nakato
patent: 6407428 (2002-06-01), Krishnan et al.
patent: 6441436 (2002-08-01), Wu et al.
patent: 20010011756 (2001-08-01), Yu
patent: 20010020722 (2001-09-01), Yang
patent: 20020063286 (2002-05-01), Wu et al.
S. Wolf and R. N. Tauber, Silicon Processing, vol. 1, Lattice press, Sunset Beach, Calif., pp. 321-322.
Fuselier Mark B.
Wei Andy C.
Wristers Derick J.
Advanced Micro Devices , Inc.
Hoang Huan
Le Thao P.
Williams Morgan & Amerson P.C.
LandOfFree
Method of making an SOI semiconductor device having... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of making an SOI semiconductor device having..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making an SOI semiconductor device having... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3405234