Method of making an igfet with selectively doped multilevel poly

Details Method of making an igfet with selectively doped multilevel poly Method of making an igfet with selectively doped multilevel poly

1997-04-21

1999-03-23

Dang, Trung

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Diffusing a dopant

438558, 438223, 438232, 438227, H01L 2138

Patent

active

058858873

ABSTRACT:
A method of making an IGFET with a selectively doped multilevel polysilicon gate that includes upper and lower polysilicon gate levels is disclosed. The method includes providing a semiconductor substrate with an active region, forming a gate insulator on the active region, forming a a lower polysilicon layer on the gate insulator, forming a first masking layer over the lower polysilicon layer, etching the lower polysilicon layer through openings in the first masking layer using the first masking layer as an etch mask for a portion of the lower polysilicon layer that forms the lower polysilicon gate level over the active region, removing the first masking layer, forming the upper polysilicon gate level on the lower polysilicon gate level after removing the first masking layer, introducing a dopant into the upper polysilicon gate level without introducing the dopant into the substrate, diffusing the dopant from the upper polysilicon gate level into the lower polysilicon gate level, and forming a source and drain in the active region. Advantageously, the lower polysilicon gate level has both an accurately defined length to provide the desired channel length and a well-controlled doping concentration to provide the desired threshold voltage.

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