Method of making an assembly package having an air tight cavity

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support

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438121, H01L 2144

Patent

active

059435585

ABSTRACT:
A method of making an assembly package having an air tight cavity for housing an electronic element such as a GaAs semiconductor chip. The method includes the formation of a dielectric base by placing a placing a conductive lead frame comprising a frame pad and a plurality of conductive leads inside a die having a top interior surface and a bottom interior surface, injecting a thermally setting liquefied epoxy into die cavity, curing the epoxy and removing the die. The die includes at least one post which protrudes toward the die's top interior surface such that the top surface of the post presses the inner end of each of said plurality of conductive leads against the top interior surface of the die, and also includes a pin protruding from the die's top interior surface toward the post's top surface. The post firmly holds the conductive leads in a common level plane during the injection of the epoxy into the cavity while the use of the pin results in a the formation of a pin hole in the dielectric base. Once the dielectric base is formed, the conductive leads and frame pad are plated and bonded to the electronic element. A thermally setting liquefied epoxy thereafter is dispensed onto the conductive leads and the dielectric frame disposed between the leads and a shell is positioned onto the dispensed epoxy and the epoxy is cured at an elevated temperature to form a seal between the shell and the conductive leads and dielectric base. Following the bonding of the shell, the pin hole is filled with a thermally setting liquefied epoxy and the epoxy is cured. The resulting assembly package comprises an air tight cavity housing the electronic element.

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