Fishing – trapping – and vermin destroying
Patent
1993-11-01
1996-09-17
Fourson, George
Fishing, trapping, and vermin destroying
437 12, 437 70, H01L 21322
Patent
active
055567932
ABSTRACT:
A method for gettering metallic impurities from a semiconductor substrate (25). A gettering structure is fabricated in inactive areas of a semiconductor chip (31). The gettering structure is manufactured by forming an oxide (30) having a bird's head structure contacting a heavily doped region (28). The combination creates precipitation nuclei to which the metallic impurities migrate. The metallic impurities are sequestered by the precipitation nuclei or trap sites and rendered incapable of degrading the electrical characteristics of a semiconductor device.
REFERENCES:
patent: 5220192 (1993-06-01), Owens et al.
patent: 5242854 (1993-09-01), Solheim et al.
Wolf, S., et al, Silicon Processing for the VLSI Era: vol. 1, Process Technology, Lattice Press, 1986, pp. 63-65.
Wolf, S., Silicon Processing for the VLSI Era: vol. 2, Process Integration, Lattice Press, 1990, pp. 20-24, 30 & 31.
Adler Steven J.
Hawkins George W.
Lesk Israel A.
Pegler Peter L.
Pirastehfar Hassan
Berman Bernard
Dover Rennie William
Fourson George
Motorola Inc.
Wolin Harry A.
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