Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
1999-09-17
2003-05-13
Baxter, Janet (Department: 1752)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S314000, C430S312000, C430S315000, C430S318000, C430S270100, C257S179000
Reexamination Certificate
active
06562545
ABSTRACT:
BACKGROUND OF THE INVENTION
1. The Field of the Invention
The present invention relates to substrates that include an array of sockets for receiving a ball grid array chip package. More particularly, the present invention relates to methods for forming an array of sockets and associated electrical traces wherein a relatively thick photoresist layer is used to construct the sockets and traces.
2. The Relevant Technology
Frequently, after an integrated circuit is manufactured, a testing process is conducted on the integrated circuit by subjecting it to preselected set of input conditions in order to measure its response or other parameters. Such testing is often conducted after a semiconductor die has been packaged. As used herein, the terms “packaged chip” and “chip package” refer to an integrated circuit or another semiconductor structure that has been combined with external and additional structure. The term “semiconductor structure” extends to any device or assembly that includes circuitry defined in a semiconductive material, and further extends to a chip package that includes semiconductive material. The external and additional structure may be used, for example, for mounting the semiconductor structure to a printed circuit board or other external circuitry, for establishing electrical connection between the semiconductor structure and external circuitry, for improving the ease of handling or transporting the semiconductor structure, or for protecting the semiconductor structure from environment al conditions.
A common chip package design is a ball grid array package (BGA), in which an array of solder balls are arranged over at least one surface of the chip package in a position and with dimensions that are selected so as to easily establish electrical connection with external circuitry.
Testing a packaged chip is conventionally accomplished by connecting electrical leads on the packaged chip to testing circuitry in order to determine the reliability and accuracy of the integrated circuit's response to a predetermined set of input conditions. Of course, testing is best conducted in a manner such that the tested packaged chips remain in a condition for use without any additional processing. Likewise, it is important to conduct testing such that the testing device can be easily and quickly reused for testing a subsequent integrated circuit.
In order to ensure the reusability of both the tested packaged chip and the testing device, there have been developed mounting surfaces on testing devices that are adapted to receive and make electrical connection with a packaged chip. Typically, such mounting surfaces include an array of electrical contact points that correspond to the pattern of an array of solder balls on a surface of a BGA package.
An example of a substrate to which a ball grid array package may be temporarily mounted is seen in FIG.
1
. The assembly includes a substrate
10
which may be any one of a wide number of dielectric materials in which a pit or depression
12
is formed. A via
14
is formed through substrate
10
so as to have an opening at opposite sides of substrate
10
. A conformal metal layer
16
is disposed over selected portions of the surfaces of substrate
10
as seen in FIG.
1
. In particular, conformal metal layer
16
coats the surfaces of pit
12
, the inner surfaces of via
14
, and provides an electrical trace
18
therebetween. In this manner, pit
12
is electrically connected with via
14
such that electrical connection may be established with external testing circuitry.
A ball grid array package
20
is disposed over substrate
10
such that solder ball
22
is aligned with pit
12
. In practice, of course, substrate
10
typically includes a plurality of pits
12
while BGA package
20
includes a corresponding plurality of solder balls
22
. BGA package
20
is pressed down onto substrate
10
such that solder ball
22
partially enters pit
12
. In so doing, solder ball
22
makes electrical contact with conformal metal layer
16
.
Because solder is significantly more malleable than the metal of conformal metal layer
16
, solder ball
22
deforms upon being partially inserted into pit
12
. When BGA package
20
is mounted on substrate
10
, solder balls
22
are typically not subjected to heat that is sufficient to cause melting or other significant deformation thereof. Instead, BGA package
20
is ordinarily clamped onto substrate
10
to secure it in place. After testing is complete, the clamping pressure is removed and solder ball
22
may be retracted from pit
12
. If the method of mounting BGA package
20
to substrate
10
is successful, a tested BGA package
20
typically remains in a condition to be used in the same manner as an untested BGA package.
Despite the advantages of the assembly seen in
FIG. 1
, certain problems have been presented during the manufacturing of substrate
10
and the use thereof in testing an integrated circuit. For example, the formation of pits
12
and vias
14
require a number of individual manufacturing steps. For example, a drilling, punching, or etching operation must be used to form via
14
and an etching step or other suitable process must be used to form pit
12
in substrate
10
before conformal metal layer
16
may be deposited thereon.
Another common problem in the industry is that individual solder balls arrayed on a BGA package may vary in size one from another by 20% or more. This variation may be in the vertical dimension of the solder ball, in its lateral diameter dimension, or in both. When such variation is experienced, it may be impossible to cause each solder ball
22
to simultaneously contact the corresponding pit
12
in substrate
10
. For example, if one solder ball is significantly shorter than the others, such a solder ball may fail to penetrate pit
12
. Likewise if a solder ball has an exceptionally small diameter, the solder ball may penetrate the pit without making contact with the conformal metal layer. When this occurs, the testing operation cannot be conducted because electrical signals and power are not delivered to each solder ball.
Furthermore, when electrical conductive paths, such as electrical trace
18
, are formed with relatively small width and thickness dimensions, the resulting resistance of the conductive paths may be greater than ideal values, particularly when using materials with less than optimum conductivity characteristics. However, current practices for forming mounting substrates for testing devices involve inherent limitations as to the maximum thickness of the electrical conductive paths that may be formed. Moreover, increasing the width of electrical paths in order to reduce resistance values may not be a suitable solution. In particular, wide electrical traces may have correspondingly high capacitance characteristics, which may induce noise in the testing operation. In addition, the physical dimensions of the chip package and the mounting substrate may further constrain the width dimensions of the electrical traces.
In view of the foregoing, there is a need in the art for a socket that can reliably receive a solder ball of a BGA package such that the BGA package remains reusable. It would be an advancement in the art to provide such a socket that is also capable of making electrical contact with solder balls of varying sizes. It would be a further advantage to provide methods of manufacturing such sockets in a cost-effect manner. There is also a need in the art for a socket and associated structure that may be formed with dimensions that produce relatively low electrical resistance values.
SUMMARY OF THE INVENTION
The present invention is directed to socket assemblies that are configured to receive a solder ball of a ball grid array packet and methods for forming the same. A socket assembly is defined herein as a structure that includes at least a socket and a ball contact structure at least partially surrounding the socket. The socket assemblies of the invention are typically formed by using a relatively thick photoresist laye
Akram Salman
Hembree David R.
Baxter Janet
Micro)n Technology, Inc.
Walke Amanda C.
Workman & Nydegger & Seeley
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