Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-06-29
2003-03-25
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S627000, C438S629000, C438S633000, C438S672000, C438S688000
Reexamination Certificate
active
06537913
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for making semiconductor devices, particularly those that include copper interconnect pads that have aluminum caps.
BACKGROUND OF THE INVENTION
One way to connect a semiconductor die to the device's package is to wirebond an interconnect pad, which is located on the die, to the package. When copper is used to make such an interconnect pad, the copper may oxidize if exposed. Consequently, to make a copper containing interconnect pad, an aluminum cap may be formed on the copper to protect it from oxidation. The wirebond is then made to the aluminum cap.
The conventional process for forming an aluminum cap on a copper containing interconnect pad includes the following steps. Copper is deposited onto a dielectric layer to fill a trench that has been formed in that layer. The copper is then polished to remove it from the surface of the dielectric layer to generate a structure in which the surface of the remaining copper is substantially flush with the surface of the dielectric layer. Aluminum is deposited onto the surface of the copper and the adjoining dielectric layer. Next, a lithography and etch process is used to remove the aluminum from the dielectric layer—retaining it on top of the copper only. After conventional post etch photoresist ash and clean steps, a passivation layer is formed on top of the resulting structure.
The conventional process for forming aluminum caps on copper containing interconnect pads is relatively expensive and complex. In addition, because the structure, which this process creates, includes aluminum caps that rise above the surface of the dielectric layer, relatively narrow gaps may separate adjacent caps. It may be difficult to fill those gaps with the passivation layer that is deposited over the aluminum caps and the dielectric layer. To fill them, the passivation layer may have to be deposited using a high density plasma process. That layer may then have to be planarized. This adds still more complexity to the process.
Accordingly, there is a need for a relatively inexpensive and less complex process for making a semiconductor device that includes aluminum capped copper interconnect pads. There is also a need for such a process that generates an aluminum capped structure in which the surface of the cap is substantially flush with the surface of the adjacent dielectric layer. The present invention provides such a process.
REFERENCES:
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R. Contolini et al., “Electrochemical Planarization for Multilevel Metallization”, The Electrochemical Society, Inc., vol. 141, No. 9, Sep. 1994, ppg 2503-2510.
R. Contolini et al., “A Copper Via Plug Process by Electrochemical Planarization”, 1993 VSLI Multilevel Interconnection Conference, Jun. 8-9, 1993, Santa Clara, California.
Gurley Lynne A.
Niebling John F.
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