Method of making a semiconductor device of a high withstand volt

Details Method of making a semiconductor device of a high withstand volt Method of making a semiconductor device of a high withstand volt

1992-07-09

1993-06-29

Thomas, Tom

Fishing, trapping, and vermin destroying

437 82, 437152, 437247, H01L 21265

Patent

active

052234428

ABSTRACT:
Phosphorus is doped into one of the major surfaces of an n-type silicon semiconductor substrate, and boron is doped into the other major surface. Thereafter, the structure is diffused into the surface regions of the substrate at a high temperature and for a long time, so that an n-buffer layer is formed in the first major surface, and a p-base layer is formed in the second major surface. Impurity of n-type is diffused into the p-base layer, to form an n-emitter layer. Impurity of p-type is diffused into the n-buffer layer, to selectively form p-emitter layer. Further, n-type impurity is diffused into the n-buffer layer, to form n-type anode short layer.

REFERENCES:
patent: 3867203 (1975-02-01), Gesing et al.
patent: 3914138 (1975-10-01), Rai-Choudhury
patent: 4356503 (1982-10-01), Shafer et al.
"Low Switching Loss, High Power Gate Turn-Off Thyristors . . . ," Tsuneo Ogura et al., PESC, 88 Conference Record, pp. 903-907.

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