Method of making a semiconductor device having planarized insula

Details Method of making a semiconductor device having planarized insula Method of making a semiconductor device having planarized insula

1997-10-10

1999-11-02

Chaudhari, Chandra

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438669, 438636, 438695, 438692, 438782, 438906, 438761, H01L 2130

Patent

active

059769734

ABSTRACT:
A method of manufacturing a semiconductor device has the steps of: forming a wiring pattern by dry etching a wiring layer on a semiconductor substrate, using a resist pattern as a mask; immersing the wiring pattern in amine containing liquid to remove deposition residues formed during the dry etching; then, processing the wiring pattern with fluid not containing amine and being capable of removing deposition residues; forming a conformal insulating layer on the processed wiring pattern; and forming an insulating layer having a planarizing function on the conformal insulating layer by CVD. This method is suitable for multi-layer wiring, and can form an interlayer insulating film having a satisfactory planarizing function.

REFERENCES:
patent: 4770899 (1988-09-01), Zeller
patent: 5630904 (1997-05-01), Aoyama et al.
patent: 5744402 (1998-04-01), Fukazawa et al.
patent: 5759973 (1998-06-01), Honda et al.
patent: 5849639 (1998-12-01), Molloy et al.
Wolf, Stanley, Silicon Processing for the VLSI ERA, vol. 2, pp. 237-238, 1990.

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