Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-03-07
2004-11-02
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S646000, C438S687000, C257S062000
Reexamination Certificate
active
06812136
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a wiring layer of copper (Cu) and, more specifically, to a semiconductor device using a metal film, containing copper as a principal ingredient, for filling a hole.
Recently, in a very-high-speed, very-small-sized device, there has been fear of increasing in wiring resistance and decreasing in operation speed due to miniaturization of a wiring layer. At present, the wiring layer is formed of copper whose electric resistance is lower than that of an aluminum (Al) alloy which is commonly used.
The electric resistance R of the wiring layer is expressed by the following equation:
R=&rgr;L/S
where L is the length of the wiring layer, S is the area of the cross section of the wiring layer, and &rgr; is the resistivity proper to metal materials used in the wiring layer. The length L and area S depend upon circuit design.
When a wiring layer is formed, its resistivity &rgr; and length L have substantially the same values as designed, but the area S does not. In particular, the area S of a cross section of the wiring layer in a contact hole for connecting the wiring layer on an interlayer insulation film with an element region, is not so large, nor is that of the wiring layer in a connecting hole (hereinafter referred to as a via hole) for connecting wiring layers between which an inter-layer insulation film is interposed. This is caused by the fact that a decrease in power supply voltage is not promoted in view of an operation margin of elements and a user's convenience as the wiring layer is decreased in size and, in other words, the interlayer insulation film cannot be thinned so much in consideration of an isolation voltage. As a result, the diameter of a contact hole or a via hole (hereinafter each referred to as a hole) becomes smaller, whereas the depth of the hole remains unchanged; therefore, the aspect ratio, which is a ratio of the depth of the hole to the diameter thereof, is increased.
Since a wiring layer is usually formed in a hole by sputtering a metal film, if the aspect ratio of the hole is high, the coverage of the metal film is deteriorated and the area S of the cross section of the wiring layer in the hole is reduced; accordingly, the wiring layer is increased in electric resistance R. In order to form a low-resistance wiring layer using copper, too, it is important how much the resistance of the wiring layer in the hole is lowered.
There are three methods of forming a wiring layer in a hole. The first method is to bury a metal film such as tungsten (W), which differs from copper, in a hole as a wiring layer. The second method is to grow a copper film from the entire inner wall of a hole by CVD. The third method is to form a copper film by sputtering and then cause copper to flow by heat treatment to fill a hole.
On the other hand, there are two methods as a technique of forming a wiring layer using copper. In the first method, a copper film is formed on the surface of an interlayer insulation film at the same time when a hole is filled, as in the foregoing second and third methods, and an unnecessary portion is removed from the copper film by etching such as RIE to form a pattern of a wiring layer. In the second method, a wiring groove and a hole for a wiring layer is formed in an interlayer insulation film, then a copper film is formed to fill both the wiring groove and the hole, and an unnecessary portion is removed from the copper film on the interlayer insulation film. In other words, a copper film is left only both in the wiring groove and in the hole to form a wiring layer (hereinafter referred to as a copper buried wiring layer).
When a wiring layer using copper is formed as described above, a barrier metal is required to prevent copper from being diffused into an element region as in the case where a wiring layer is formed using aluminum and, in other words, a barrier metal has to be formed before a copper film is done to prevent copper from reaching its lower element region. It is now considered to use titanium (Ti) or titanium alloy as the barrier metal. In using such metal as a barrier metal, an alloy may be formed in an interface between the barrier metal and copper.
An example of forming the foregoing wiring layer using copper will now be described.
FIGS. 1A
to
1
C are schematic cross-sectional views illustrating a main part of a semiconductor device in order to explain a prior art manufacturing process of the device.
As illustrated in
FIG. 1A
, an element or an underlying wiring layer (neither of which is shown) is formed on a silicon substrate
1
and then an interlayer insulation film
2
is formed on the whole surface of the resultant structure. A hole
3
, which corresponds to part of the element or an upper portion of the underlying wiring layer (both of which are called a conductive portion) and serves as a contact hole or a via hole, is formed in the interlayer insulation film
2
. Though not shown in particular, a wiring groove is formed in the surface of the interlayer insulation film
2
including a region where the hole
3
is formed. After that, a barrier metal
4
is formed of titanium alloy on the entire surface of the interlayer insulation film
2
including the inner portions of the hole
3
and wiring groove. As an example of a metal film using copper, a copper film
5
is formed on the barrier metal
4
by sputtering and CVD.
If the hole
3
or wiring groove is not completely filled with the copper film
5
, it is done by heat treatment as shown in FIG.
1
B. Subsequently thereto, as illustrated in
FIG. 1C
, an excess copper film
5
on the surface of the interlayer insulation film
2
is removed, together with its underlying barrier metal
4
, by chemical mechanical polishing (CMP). By the process described above, a copper buried wiring layer
6
is formed in the hole
3
and wiring groove with the barrier metal interposed therebetween.
The above-described prior art process of forming a wiring layer using copper, has the following three problems.
The first problem is as follows. If, as shown in
FIG. 2A
, the surface of the barrier metal
4
has an exposed portion
4
a
not sufficiently covered with the copper film
5
, a void
7
may remain in the hole
3
after heat treatment as shown in
FIG. 2B and
, in this case, a contact failure will occur or the copper film
5
in the hole
3
will increase in resistance and thus the copper buried wiring layer
6
in the hole
3
will decrease in reliability. The reason is as follows. When the copper is increased in fluidity by the heat treatment, the exposed portion
4
a
of the barrier metal
4
is covered with the copper film
5
and thus the sum of interface energy caused in the interface between the copper film
5
and barrier metal
4
, surface energy of the copper film
5
, and surface energy of the barrier metal
4
will increase. In other words, the decrease in reliability is caused by poor wettability and adhesion between the copper and barrier metal
4
.
The second problem is that when an excess portion is removed from the film
5
by polishing such as CMP to form a copper buried wiring layer
6
, exfoliation
8
may be caused by mechanical action such as polishing between the copper buried wiring layer
6
and barrier metal
4
as illustrated in FIG.
3
. This exfoliation
8
is due to poor adhesion between copper and barrier metal
4
. Like the first problem, the second problem decreases the reliability of the copper buried wiring layer
6
.
The third problem is that exfoliation occurs in the copper buried wiring layer
6
after a semiconductor pellet is resin-molded formed through the above process.
FIG. 4
is a top view of FIG.
3
. For example, when a heat cycle test is carried out at room temperature and at a temperature of about 100° C., exfoliation
8
will occur between the copper buried wiring layer
6
and barrier metal
4
in the hole
3
and wiring groove
9
. This exfoliation is also due to poor adhesion between copper and barrier metal
4
; accordingly, lik
Koyama Mitsutoshi
Kubota Takeshi
Shimizu Toshio
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Pham Long
Weiss Howard
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