Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1998-08-31
2000-07-18
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438166, 438384, H01L 2100, H01L 2184, H01L 2120
Patent
active
060906480
ABSTRACT:
A method of making a self-aligned, integrated resistor load on ultrathin silicon on sapphire film, with the method being used to manufacture an FET and a resistor load. While the film can be used, for example, to manufacture a four transistor SRAM, it is not limited to such applications. The method encompasses an integral resistor load which can be integrated with analog components or formed as part of an integrated circuit for electrostatic discharge (ESD) circuitry, or the like. The resistor load can be integrally formed from the same silicon island which forms a corresponding transistor. Because the resistor load can be made from, and integral with, the ultra thin silicon material, it can be automatically self-aligned to the transistor. The self-aligned, integrated resistor loads are comprised of an insulating substrate, with a layer of silicon formed on the insulating substrate. The self-aligned resistor loads are integrally formed in the same film as the transistors and thereby require no second layer of deposited material such as polysilicon. The layer over the substrate additionally provides improved heat sinking capability, as well as a diffusion barrier which enables the silicon film to be appropriately implanted with dopant materials and annealed by standard fabrication processes.
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Burgener Mark L.
Reedy Ronald E.
Berezny Neah
Niebling John F.
Peregrine Semiconductor Corp.
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