Fishing – trapping – and vermin destroying
Patent
1996-02-26
1997-10-14
Niebling, John
Fishing, trapping, and vermin destroying
437 42, 437 44, H01L 2184
Patent
active
056772068
ABSTRACT:
A poly-silicon thin film transistor having LDD structure which has very low source/drain resistance is described. A TFT according to a preferred embodiment of the present invention, has, on a substrate, an active poly-silicon layer with a heavily-doped region on an outer peripheral thereof, a lightly doped region on ban inside the outer peripheral band and an un-doped region on a center part thereof. A gate insulating layer is comprised of a lower oxide layer, a nitride layer and an upper oxide layer. The lower oxide layer is formed over the whole active poly-silicon layer, but the nitride layer and the upper oxide layer are formed only on the un-doped portions of the active poly-silicon layer. A gate electrode is then formed on the upper oxide layer. A method for forming this structure is also described, which method uses a dry etch to remove the upper oxide layer and the nitride layer, but not the lower oxide layer prior to ion implantation of the active region.
REFERENCES:
patent: 5064775 (1991-11-01), Chang
patent: 5436481 (1995-07-01), Egawa et al.
patent: 5464783 (1995-11-01), Kim et al.
Kim Jin-Hong
Lee Joo-hyung
Mah Suk-Bum
Booth Richard A.
Niebling John
Samsung Electronics Co,. Ltd.
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